FOD8001 Ver la hoja de datos (PDF) - Fairchild Semiconductor

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componentes Descripción

Fabricante

FOD8001

High Noise Immunity, 3.3V/5V Logic Gate Optocoupler

Fairchild Semiconductor 

Test Circuits

VDD1 = 3.3V

1

0.1µF

2

0V–3.3V

3

Pulse width = 40ns

Duty Cycle = 50%

4

8

7

0.1µF

VO

6

CL

5

VDD2 = 3.3V

Input

tPLH

VIN

tPHL

3.3V

50%

Output

90%

VOUT 10%

tR

VOH

50%

VOL

tF

Figure 13. Test Circuit for Propogation Delay Time and Rise Time, Fall Time

VDD1 = 3.3V

1

0.1µF

SW

2

A

B

3

4

+–

VCM

8

7

0.1µF

VDD2 = 3.3V

VO

6

CL

5

GND

VOH

VOL

1kV

VCM

Switching Pos. (A) VIN = 3.3V

0.8 x VDD

0.8V

Switching Pos. (B) VIN = 0V

CMH

CML

Figure 14. Test Circuit for Instantaneous Common Mode Rejection Voltage

©2008 Fairchild Semiconductor Corporation

FOD8001 Rev. 1.0.3

7

www.fairchildsemi.com

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