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FOD050LS(2004) Ver la hoja de datos (PDF) - Fairchild Semiconductor

Número de pieza
componentes Descripción
Fabricante
FOD050LS
(Rev.:2004)
Fairchild
Fairchild Semiconductor Fairchild
FOD050LS Datasheet PDF : 13 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
SINGLE-CHANNEL: FOD050L
DUAL-CHANNEL: FOD053L
LVTTL/LVCMOS 3.3V
HIGH SPEED TRANSISTOR
OPTOCOUPLERS
FOD250L
SWITCHING CHARACTERISTICS (TA = 0 to 70°C unless otherwise specified., VCC = 3.3 V)
Parameter
Test Conditions
Symbol Device Min Typ** Max Unit
Propagation delay
time to logic low
Propagation delay
time to logic high
Common mode
transient
immunity at
logic high
Common mode
transient
immunity at
logic low
25°C
(RL = 1.9 k, IF = 16 mA) (Note 2) (Fig. 10)
TPHL
25°C
(RL = 1.9 k, IF = 16 mA) (Note 2) (Fig. 10)
TPLH
(IF = 0 mA, VCM = 1,000 VP-P, RL = 4.1 k)
(Note 3, 4) (Fig. 11) TA = 25°C
(IF = 0 mA, VCM = 1,000 VP-P)
TA = 25°C, (RL = 1.9 k)
(Note 2, 4) (Fig. 11)
(IF = 16 mA, VCM = 1,000 VP-P, RL = 4.1 k)
(Note 3, 4) (Fig. 11) TA = 25°C
(IF = 16 mA, VCM = 1,000 VP-P) (RL = 1.9 k)
(Note 2, 4) (Fig. 11)
|CMH|
|CML|
— 1.0
All
µs
— 2.0
— 1.0
All
µs
— 2.0
All
5,000 50,000 — V/µs
All
5,000 50,000 — V/µs
All
5,000 35,000 — V/µs
All
5,000 35,000 — V/µs
** All Typicals at TA = 25°C
ISOLATION CHARACTERISTICS (TA = 0 to 70°C Unless otherwise specified)
Characteristics
Test Conditions
Symbol Device Min Typ** Max Unit
Input-output
insulation leakage
current
Withstand insulation
test voltage
Resistance
(input to output)
Capacitance
(input to output)
(Relative humidity = 45%)
(TA = 25°C, t = 5 s)
(VI-O = 3000 VDC)
II-O
(Note 5)
(f = 60 Hz, TA = 25°C)
(Note 5) ( t = 1 min.)
VISO
(Note 5) (VI-O = 500 VDC) RI-O
(Note 5) (f = 1 MHz) CI-O
All
FOD050L
FOD053L
FOD250L
All
2500
5000
1011
All
1012
0.2
1.0
µA
VRMS
pF
Notes
1. Current Transfer Ratio is defined as a ratio of output collector current, IO, to the forward LED input current, IF, times 100%.
2. The 1.9 kload represents 1 TTL unit load of 1.6 mA and 5.6 kpull-up resistor.
3. The 4.1 kload represents 1 LSTTL unit load of 0.36 mA and 6.1kpull-up resistor.
4. Common mode transient immunity in logic high level is the maximum tolerable (positive) dVcm/dt on the leading edge of the
common mode pulse signal VCM, to assure that the output will remain in a logic high state (i.e., VO>2.0 V). Common mode
transient immunity in logic low level is the maximum tolerable (negative) dVcm/dt on the trailing edge of the common mode
pulse signal, VCM, to assure that the output will remain in a logic low state (i.e., VO<0.8 V).
5. Device is considered a two terminal device: Pins 1, 2, 3 and 4 are shorted together and Pins 5, 6, 7 and 8 are shorted
together.
I
© 2004 Fairchild Semiconductor Corporation
Page 4 of 13
6/14/04

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