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FDN5618PT/RNL Ver la hoja de datos (PDF) - Fairchild Semiconductor

Número de pieza
componentes Descripción
Fabricante
FDN5618PT/RNL
Fairchild
Fairchild Semiconductor Fairchild
FDN5618PT/RNL Datasheet PDF : 5 Pages
1 2 3 4 5
Electrical Characteristics
Symbol
Parameter
TA = 25°C unless otherwise noted
Test Conditions
Min Typ Max Units
Off Characteristics
BVDSS
Drain–Source Breakdown Voltage
BVDSS
===TJ
IDSS
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current
IGSSF
Gate–Body Leakage, Forward
IGSSR
Gate–Body Leakage, Reverse
VGS = 0 V, ID = –250 µA
–60
ID = –250 µA,Referenced to 25°C
VDS = –48 V,
VGS = 20V,
VGS = –20 V
VGS = 0 V
VDS = 0 V
VDS = 0 V
V
–58
mV/°C
–1
µA
100 nA
–100 nA
On Characteristics (Note 2)
VGS(th)
Gate Threshold Voltage
VGS(th)
===TJ
RDS(on)
Gate Threshold Voltage
Temperature Coefficient
Static Drain–Source
On–Resistance
ID(on)
On–State Drain Current
gFS
Forward Transconductance
VDS = VGS, ID = –250 µA
–1 –1.6 –3
V
ID = –250 µA,Referenced to 25°C
4
mV/°C
VGS = –10 V, ID = –1.25 A
VGS = –4.5 V, ID = –1.0 A
VGS = –10 V, ID = –3 A TJ=125°C
0.148 0.170
0.185 0.230
0.245 0.315
VGS = –10 V, VDS = –5 V
–5
A
VDS = –5 V,
ID = –1.25 A
4.3
S
Dynamic Characteristics
Ciss
Input Capacitance
Coss
Output Capacitance
Crss
Reverse Transfer Capacitance
VDS = –30 V,
f = 1.0 MHz
V GS = 0 V,
430
pF
52
pF
19
pF
Switching Characteristics
td(on)
Turn–On Delay Time
tr
Turn–On Rise Time
td(off)
Turn–Off Delay Time
tf
Turn–Off Fall Time
Qg
Total Gate Charge
Qgs
Gate–Source Charge
Qgd
Gate–Drain Charge
(Note 2)
VDD = –30 V,
VGS = –10 V,
ID = –1 A,
RGEN = 6
VDS = –30 V,
VGS = –10 V
ID = –1.25 A,
6.5 13
ns
8
16
ns
16.5 30
ns
4
8
ns
8.6 13.8 nC
1.5
nC
1.3
nC
Drain–Source Diode Characteristics and Maximum Ratings
IS
Maximum Continuous Drain–Source Diode Forward Current
VSD
Drain–Source Diode Forward
Voltage
VGS = 0 V, IS = –0.42 (Note 2)
–0.42 A
–0.7 –1.2
V
Notes:
1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of
the drain pins. RθJC is guaranteed by design while RθCA is determined by the user's board design.
a) 250°C/W when mounted on a
0.02 in2 pad of 2 oz. copper.
b) 270°C/W when mounted on a
minimum pad.
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width =300 µs, Duty Cycle =2.0
FDN5618P Rev C(W)

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