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AS4LC4M4883C

4 MEG x 4 DRAM 3.3V, EDO PAGE MODE

Austin Semiconductor 

AUSTIN SEMICONDUCTOR, INC.

AS4LC4M4 883C

4 MEG x 4 DRAM

EDO PAGE MODE

The AS4LC4M4E8 provides EDO PAGE MODE which is

an accelerated FAST PAGE MODE cycle. The primary

advantage of EDO is the availability of data-out even after

?C?A/S returns HIGH. EDO allows ?C?A/S precharge time (tCP)

to occur without the output data going invalid. This elimi-

nation of ?C?A/S output control allows pipeline READs.

FAST-PAGE-MODE DRAMs have traditionally turned

the output buffers off (High-Z) with the rising edge of

?C?A/S. EDO-PAGE-MODE DRAMs operate similarly to

FAST-PAGE-MODE DRAMs, except data will remain valid

or become valid after ?C?A/S goes HIGH during READs,

provided ?R?A/S and ?O/E are held LOW. If ?O/E is pulsed while

?R?A/S and ?C?A/S are LOW, data will toggle from valid data to

High-Z and back to the same valid data. If ?O/E is toggled or

pulsed after ?C?A/S goes HIGH while ?R?A/S remains LOW,

data will transition to and remain High-Z (refer to Figure 1).

?W/E can also perform the function of disabling the output

devices under certain conditions, as shown in Figure 2.

During an application, if the DQ outputs are wire OR’d,

?O/E must be used to disable idle banks of DRAMs. Alterna-

tively, pulsing ?W/E to the idle banks during ?C?A/S high time

will also High-Z the outputs. Independent of ?O/E control,

the outputs will disable after tOFF, which is referenced

from the rising edge of ?R?A/S or ?C?A/S, whichever occurs last.

RAS

V

V

IH

IL

CAS

V

V

IH

IL

,, ,,, ,,,,,,, ,,,,,,, ,,,,,, ,,,,, ADDR

V

V

IH

IL

ROW

COLUMN (A)

COLUMN (B)

COLUMN (C)

COLUMN (D)

DQ

V IOH

V IOL

OPEN

,,VALID DATA (A)

tOD

tOES

VALID DATA (A)

,,, VALID DATA (B)

tOD

tOEHC

,,VALID DATA (C)

tOD

,VALID DATA (D)

OE

V IH

V IL

tOE

tOEP

The DQs go back to

Low-Z if tOES is met.

The DQs remain High-Z

until the next CAS cycle

if tOEHC is met.

Figure 1

OUTPUT ENABLE AND DISABLE

The DQs remain High-Z

until the next CAS cycle

if tOEP is met.

AS4LC4M4

Rev. 11/97

DS000022

2-74

Austin Semiconductor, Inc., reserves the right to change products or specifications without notice.

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