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FAN6920MRMY

Integrated Critical-Mode PFC and Quasi-Resonant Current-Mode PWM Controller

Fairchild Semiconductor 

Pin Definitions (Continued)

Pin #

6

7

8

9

10

11

12

13

14

15

16

Name

OPFC

VDD

OPWM

GND

DET

FB

RT

VIN

ZCD

NC

HV

Description

Totem-pole driver output to drive the external power MOSFET. The clamped gate output voltage

is 15.5V.

Power supply. The threshold voltages for startup and turn-off are 12V and 7V, respectively. The

startup current is less than 30µA and the operating current is lower than 10mA.

Totem-pole output generates the PWM signal to drive the external power MOSFET. The clamped

gate output voltage is 17.5V.

The power ground and signal ground.

This pin is connected to an auxiliary winding of the PWM transformer through a resistor divider for

the following purposes:

 Producing an offset voltage to compensate the threshold voltage of PWM current limit for over-

power compensation. The offset is generated in accordance with the input voltage when the

PWM switch is on.

 Detecting the valley voltage signal of drain voltage of the PWM switch to achieve the valley

voltage switching and minimize the switching loss on the PWM switch.

 Providing output over-voltage protection. A voltage comparator is built in to the DET pin. The

DET pin detects the flat voltage through a voltage divider paralleled with auxiliary winding. This

flat voltage is reflected to the secondary winding during PWM inductor discharge time. If output

over voltage and this flat voltage are higher than 2.5V, the controller stops all PFC and PWM

switching operation. The protection mode is auto-recovery.

Feedback voltage pin used to receive the output voltage level signal to determine PWM gate duty

for regulating output voltage. The FB pin voltage can also activate open-loop, overload protection

and output-short circuit protection if the FB pin voltage is higher than a threshold of around 4.2V

for more than 50ms.The input impedance of this pin is a 5kΩequivalent resistance. A 1/3

attenuator is connected between the FB pin and the input of the CSPWM/FB comparator.

Adjustable over-temperature protection and external protection triggering. A constant current

flows out from the RT pin. When RT pin voltage is lower than 0.8V (typical), protection is

activated and stops PFC and PWM switching operation. This protection is auto-recovery.

Line-voltage detection for brownin / out protections. This pin can receive the AC input voltage

level through a voltage divider. The voltage level of the VIN pin is not only used to control

RANGE pin’s status, but it can also perform brownin / out protection for AC input voltage UVP.

Zero-current detection for the PFC stage. This pin is connected to an auxiliary winding coupled to

PFC inductor winding to detect the ZCD voltage signal once the PFC inductor current discharges

to zero. When the ZCD voltage signal is detected, the controller starts a new PFC switching

cycle. When the ZCD pin voltage is pulled to under 0.2V (typical), it disables the PFC stage and

the controller stops PFC switching. This can be realized with an external circuit if disabling the

PFC stage is desired.

No connection

High-voltage startup pin is connected to the AC line voltage through a resistor (100kΩtypical) for

providing a high charging current to VDD capacitor.

© 2010 Fairchild Semiconductor Corporation

FAN6920MR • Rev. 1.0.3

5

www.fairchildsemi.com

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