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EPL09060GH Ver la hoja de datos (PDF) - ELAN Microelectronics

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EPL09060GH
EMC
ELAN Microelectronics EMC
EPL09060GH Datasheet PDF : 54 Pages
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EPL09060
9 COM/60 SEG LCD Driver
Column Address Counter
The column address counter is an 8-bit preset counter which provides a DDRAM
column address, and is independent of page address register.
It will increment (+1) the column address whenever “display data read” or “display
data write” instructions are issued. However, the incrementing of column address is
stopped at column address 65H. The count-lock will be released by the “column
address set” instruction again. The counter can inverts the correspondence between
the column address and segment driver direction by means of “ADC select”
instruction.
Page Address Register
The page address register provides a DDRAM page address. The Page Address 6 is
used for icon display, and only D0 is valid.
7.3 LCD Driver Circuits
COM0
COM7 COMI SEG0
SEG59
V0
V1
V2
V3
V4
VSS
Common Driver
Circuits
Segment Driver
Circuits
Display Timing
Generator
Circuit
Shift Register
Latch Circuit
From the Display Data RAM
Figure 9 LCD Driver Circuits
This driver circuit is configured by 8-common drivers, 60-segment drivers and 1-icon-
common driver. This LCD panel driver voltage depends on the combination of
display data and FR (internal) signal.
7.3.1 Display Data Latch Circuit
The display data latch circuit is a latch that temporarily stores the display data that is
output to the liquid crystal driver circuit from the display data RAM. “Display on/off”,
“Inverse display on/off” and “Entire display on/off” instructions control only the
contents of this latch circuit, they cannot change the contents of the DDRAM.
Product Specification (V1.0) 12.28.2005
17

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