EM84513BEP Ver la hoja de datos (PDF) - ELAN Microelectronics

Número de pieza

componentes Descripción

Fabricante

EM84513BEP

Mouse Controller

ELAN Microelectronics 

EM84513

Mouse Controller

Bit

Function

1

Start bit (always 0)

2-9

Data bits (D0 – D7)

10

Parity bit (odd parity)

11

Stop bit (always 1)

Data Output ( data from EM84513 to system ):

If CLK is low ( inhibit status ) , data is no transmission.

If CLK is high and DATA is low ( request-to-send ), data is updated. Data is received

from the system and no transmission are started by EM84513 until CLK and DATA both

high. If CLK and DATA are both high, the transmission is ready. DATA is valid prior to

the falling edge of CLK and beyond the rising edge of CLK. During transmission,

EM84513 check for line contention by checking for an inactive level on CLK at intervals

not to exceed 100u sec. Contention occurs when the system lowers CLK to inhibit

EM84513 output after EM84513 has started a transmission. If this occurs before the

rising edge of the tenth clock, EM84513 internal store its data in its buffer and returns

DATA and CLK to an active level. If the contention does not occur by the tenth clock,

the transmission is complete. Following a transmission, the system inhibits EM84513

by holding CLK low until it can service the input or until the system receives a request to

send a response from EM84513.

Data Input ( from system to EM84513 ):

System first check if EM84513 is transmitting data. If EM84513 is transmitting, the

system can override the output forcing CLK to an inactive level prior to the tenth clock.

If EM84513 transmission is beyond the tenth clock, the system receives the data. If

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output. When the system is ready to output start bit (0), it allows CLK go to active level.

If request-to-send is detected, EM84513 clocks 11 bits. Following the tenth clock

EM84513 checks for an active level on the DATA line, and if found, force DATA low ,

and clock once more. If occurs framing error, EM84513 continue to clock until DATA is

high, then clocks the line control bit and request a Resend. When the system sends out

a command or data transmission that requires a response, the system waits for

EM84513 to response before sending its next output.

7.1.4 PS/2 Mouse Error Handling

A Resend command (FE ) following receipt of an invalid input or any input with

incorrect parity.

If two invalid input are received in succession, an error code of hex FC send to the

system.

The counter accumulators are cleared after receiving any command except

“Resend”.

EM84513 receives a Resend command ( FE ), it transmit its last packet of data.

In the stream mode “Resend” is received by EM84513 following a 3-byte data

packet transmission

6•

Product Specification (V0.9) 06.16.2006

(This specification is subject to change without further notice)

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