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EM78P157NAKM

8-Bit Microcontroller with OTP ROM

ELAN Microelectronics 

EM78P157N

8-Bit Microcontroller with OTP ROM

4.1.6 Port 5 ~ Port 6 (R5 ~ R6) Registers

R5 and R6 are I/O registers. Only the lower 4 bits of R5 are available.

4.1.7 Interrupt Status (RF) Register

Bit 7

-

Bit 6

-

Bit 5

-

Bit 4

-

Bit 3

-

Bit 2

EXIF

RF can be cleared by instruction but cannot be set

IOCF is the interrupt mask register (see Section 4.2.9)

Bit 1

ICIF

NOTE

The result of reading RF is the "logic AND" of RF and IOCF.

0: disable interrupt request

1: enable interrupt request

Bit 0 (TCIF): TCC overflow interrupt flag

Set when TCC overflows. Reset by software.

Bit 1 (ICIF): Port 6 input status change interrupt flag

Set when Port 6 input changes. Reset by software.

Bit 2 (EXIF): External interrupt flag

Set by falling edge on /INT pin. Reset by software.

Bits 3 ~ 7: Not used

4.1.8 General Purpose (R10 ~ R3F) Registers

R10 ~ R3F are all 8-bit general-purpose registers

4.2 Special Purpose Registers

4.2.1 Accumulator (A) Register

„ Internal data transfer, or instruction operand holding

„ It cannot be addressed

Bit 0

TCIF

8•

Product Specification (V1.0) 09.22.2005

(This specification is subject to change without further notice)

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