EM78P153EP Ver la hoja de datos (PDF) - ELAN Microelectronics

Número de pieza

componentes Descripción

Fabricante

EM78P153EP

8-bit microprocessor designed and developed with low-power and high-speed CMOS technology

ELAN Microelectronics 

EM78P153E

OTP ROM

• Bits 3 ~ 7 Not used.

• RF can be cleared by instruction but cannot be set.

• IOCF is the interrupt mask register.

• Note that the result of reading RF is the "logic AND" of RF and IOCF.

8. R10 ~ R2F

• All of these are the 8-bit general-purpose registers.

4.2 Special Purpose Registers

1. A (Accumulator)

• Internal data transfer, or instruction operand holding

• It can not be addressed.

2. CONT (Control Register)

7

6

5

4

3

2

1

0

-

/INT

TS

TE

PAB

PSR2

PSR1

PSR0

• Bit 0 (PSR0) ~ Bit 2 (PSR2) TCC/WDT prescaler bits.

PSR2

PSR1

PSR0

TCC Rate

0

0

0

1:2

0

0

1

1:4

0

1

0

1:8

0

1

1

1:16

1

0

0

1:32

1

0

1

1:64

1

1

0

1:128

1

1

1

1:256

WDT Rate

1:1

1:2

1:4

1:8

1:16

1:32

1:64

1:128

• Bit 3 (PAB) Prescaler assignment bit.

0: TCC

1: WDT

• Bit 4 (TE) TCC signal edge

0: increment if the transition from low to high takes place on TCC pin

1: increment if the transition from high to low takes place on TCC pin

• Bit 5 (TS) TCC signal source

0: internal instruction cycle clock

1: transition on TCC pin

When TS is 1, the R62 I/O control bit will set to 1; otherwise, it will be the value defined by user.

• Bit 6 (INT) Interrupt enable flag

0: masked by DISI or hardware interrupt

This specification is subject to change without prior notice.

10

2002/03/01

Share Link: