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EM73P461A

4-BIT MICRO-CONTROLLER FOR LCD PRODUCT

ELAN Microelectronics 

LCD display RAM:

EM73P461A

4-BIT MICRO-CONTROLLER FOR LCD PRODUCT

Preliminary

RAM address from 20h ~ 3Fh are the LCD display RAM area, the RAM data of this region can't be operated

by instruction LDHL xx and EXHL.

ZERO-PAGE:

From 00h to 0Fh is the location of zero-page. It is used as the pointer in zero-page addressing mode for the

instruction of "STD #k,y; ADD #k,y; CLR y,b; CMP k,y".

PROGRAM EXAMPLE: To wirte immediate data "07h" to address "03h" of RAM and to clear bit 2 of RAM.

STD #07h, 03h ; RAM[03] ← 07h

CLR 0Eh,2 ; RAM[0Eh]2 ← 0

STACK:

There are 13-level (maximum) stack for user using for subroutine (including interrupt and CALL). User can

assign any level be the starting stack by giving the level number to stack pointer (SP).

When user using any instruction of CALL or subroutine, before entry the subroutine, the previous PC address

will be saved into stack until return from those subroutines, the PC value will be restored by the data saved

in stack.

DATA AREA:

Except the special area used by user, the whole RAM can be used as data area for storing and loading general

data.

ADDRESSING MODE

(1) Indirect addressing mode:

Indirect addressing mode indicates the RAM address by specified HL register.

For example: LDAM ; Acc ← RAM[HL]

STAM ; RAM[HL] ← Acc

(2) Direct addressing mode:

Direct addressing mode indicates the RAM address by immediate data.

For example: LDA x ; Acc← RAM[x]

STA x ; RAM[x] ← Acc

(3) Zero-page addressing mode

For zero-page region, user can using direct addressing to write or do any arithematic, comparsion or bit

manupulated operation directly.

For example: STD #k,y ; RAM[y] ← #k

ADD #k,y; RAM[y] ← RAM[y] + #k

* This specification are subject to be changed without notice.

12.27.2001 8

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