EM25LV010-25RKGBS Ver la hoja de datos (PDF) - ELAN Microelectronics
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EM25LV010-25RKGBS Datasheet PDF : 30 Pages
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EM25LV010
1 Megabit (128K x 8) Serial Flash Memory
SPECIFICATION
Memory Organization
The memory is organized as:
131,072 Bytes (8 bits per byte)
4 Blocks (256K bits or 32,768 bytes per block)
512 Pages (256 bytes per page)
Each page can be individually programmed (bits are programmed from “1” to “0”). The
device is Block or Chip Erasable (bits are erased from “0” to “1”), but not Page Erasable.
Block
3
2
1
0
Address Range
18000h
1FFFFh
10000h
17FFFh
08000h
0FFFFh
00000h
07FFFh
Table 2: Memory Organization
Hold#
W#
S#
C
D
Q
Control Logic
I/O Buffer and Data Latches
Address Register
and Counter
256 Byte Data Buffer
18000h
Block3
1FFFFh
10000h
Block2
08000h
Block1
00000h
Block0
256 Bytes (Page Size)
000FFh
Y-Decoder
Status
Register
Size of the
read-only
memory area
Figure 2: SPI Modes Supported
This specification is subject to change without further notice. (11.08.2004 V1.0)
Page 5 of 30
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