ELM406 Ver la hoja de datos (PDF) - Elm Electronics
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ELM406 Datasheet PDF : 9 Pages
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ELM406
Pin Descriptions
VDD (pin 1)
This pin is the positive supply pin, and should always
be the most positive point in the circuit. Internal
circuitry connected to this pin is used to provide
power on reset of the internal logic, so an external
reset signal is not required. Refer to the Electrical
Characteristics section for more information.
A (pin 2)
This input should be connected to what is normally
known as the ‘A’ signal from a rotary (quadrature)
encoder. The signal at this pin should lead (ie
change state before) the signal at pin 3 when the
device is being moved in a clockwise or up direction.
An external pullup resistor is required for the encoder
(a typical value is 10 KΩ), but no external capacitors
are needed (as the internal debounce circuitry
provides the filtering).
B (pin 3)
This input should be connected to what is normally
known as the ‘B’ signal from a rotary (quadrature)
encoder. The signal at this pin should lag behind (ie
change state after) the signal at pin 2 when the
device is being moved in a clockwise or up direction.
An external pullup resistor is required for the encoder
(a typical value is 10 KΩ), but no external capacitors
are needed (as the internal debounce circuitry
provides the filtering).
Write Enable (pin 4)
This input controls the state of the Clk output when
the rising edge of the CS output occurs. If pin 4 is
high, the Clk output will be held high during the CS
transition, which generates an EEPROM write for
many digital potentiometer chips.
U/D (pin 5)
This ‘Up/Down’ output changes with the direction of
encoder rotation. For a clockwise movement (the A
input appears first, followed by the B), this output will
be set high before the CS output (pin 7) is switched
low. For counter-clockwise movement, the output will
be set low prior to the Chip Select going low. The
U/D output does not change state when the CS and
Clk pulsing is complete - it remains at the level it was
just prior to the CS going low.
Clk (pin 6)
A low ‘Clock’ pulse is output at this pin 200 µsec after
the CS output has gone low. The pulse is normally
400 µsec wide, and is typically used to cause the
controlled device to change state based on the level
at the U/D pin. If pin 4 is at a high level, the Clk pulse
will be reduced in length to 200 µsec, and the CS
pulse width extended to 600 µsec, so that Clk is at a
high level while the CS output transitions from the
active low level to the quiescent high level. This will
cause the setting to be written to memory for many
devices.
CS (pin 7)
This output provides a ‘Chip Select’, or enable
function. As the rotary encoder shaft rotates, a series
of clock pulses are generated at pin 6. Just prior to
these pulses appearing, the CS output will go low,
and stay at that level for 400 µsec. This changes a
little if the Write Enable input is at a high level. See
the Output Waveforms section (on page 7) for more
information.
VSS (pin 8)
Circuit common is connected to this pin. This is the
most negative point in the circuit.
All rights reserved. Copyright 2011 Elm Electronics.
Every effort is made to verify the accuracy of information provided in this document, but no representation or warranty can be
given and no liability assumed by Elm Electronics with respect to the accuracy and/or use of any products or information
described in this document. Elm Electronics will not be responsible for any patent infringements arising from the use of these
products or information, and does not authorize or warrant the use of any Elm Electronics product in life support devices and/or
systems. Elm Electronics reserves the right to make changes to the device(s) described in this document in order to improve
reliability, function, or design.
ELM406DSA
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