EL7536(2005) Ver la hoja de datos (PDF) - Intersil
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EL7536 Datasheet PDF : 8 Pages
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EL7536
RSI/POR Function
When powering up, the open-collector Power-On-Reset
output holds low for about 100ms after VO reaches the
preset voltage. When the active-HI reset signal RSI is
issued, POR goes to low immediately and holds for the
same period of time after RSI comes back to LOW. The
output voltage is unaffected. (Please refer to the timing
diagram). When the function is not used, connect RSI to
ground and leave open the pull-up resister R4 at POR pin.
The POR output also serves as a 100ms delayed Power
Good signal when the pull-up resister R4 is installed. The
RSI pin needs to be directly (or indirectly through a resister
R6) connected to Ground for this to function properly.
VO
RSI
POR
100ms
MIN
25ns
100ms
FIGURE 14. RSI & POR TIMING DIAGRAM
Output Voltage Selection
Users can set the output voltage of the converter with a
resister divider, which can be chosen based on the following
formula:
VO
=
0.8
×
1
+
R-R----21-
Component Selection
Because of the fixed internal compensation, the component
choice is relatively narrow. We recommend 10µF to 22µF
multi-layer ceramic capacitors with X5R or X7R rating for
both the input and output capacitors, and 1.5µH to 2.2µH
inductance for the inductor.
At extreme conditions (VIN < 3V, IO > 0.7A, and junction
temperature higher than 75°C), input cap C1 is
recommended to be 22µF. Otherwise, if any of the above 3
conditions is not true, C1 can remain as low as 10µF.
The RMS current present at the input capacitor is decided by
the following formula:
IINRMS
=
-----V----O------×----(---V----I--N-----------V----O-----)
VIN
×
IO
This is about half of the output current IO for all the VO. This
input capacitor must be able to handle this current.
The inductor peak-to-peak ripple current is given as:
∆IIL
=
(---V----I--N------------V----O-----)---×-----V----O---
L × VIN × fS
• L is the inductance
• fS the switching frequency (nominally 1.4MHz)
The inductor must be able to handle IO for the RMS load
current, and to assure that the inductor is reliable, it must
handle the 1.5A surge current that can occur during a
current limit condition.
Current Limit and Short-Circuit Protection
The current limit is set at about 1.5A for the PMOS. When a
short-circuit occurs in the load, the preset current limit
restricts the amount of current available to the output, which
causes the output voltage to drop below the preset voltage.
In the meantime, the excessive current heats up the
regulator until it reaches the thermal shut-down point.
Thermal Shut-Down
Once the junction reaches about 145°C, the regulator shuts
down. Both the P channel and the N channel MOSFETs turn
off. The output voltage will drop to zero. With the output
MOSFETs turned off, the regulator will soon cool down.
Once the junction temperature drops to about 130°C, the
regulator will restart again in the same manner as EN pin
connects to logic HI.
Thermal Performance
The EL7536 is in a fused-lead MSOP10 package. Compared
with regular MSOP10 package, the fused-lead package
provides lower thermal resistance. The θJA is 100°C/W on a
4-layer board and 125°C/W on 2-layer board. Maximizing the
copper area around the pins will further improve the thermal
performance.
Layout Considerations
The layout is very important for the converter to function
properly. The following PC layout guidelines should be
followed:
• Separate the Power Ground ( ) and Signal Ground ( );
connect them only at one point right at the pins
• Place the input capacitor as close to VIN and PGND pins
as possible
• Make the following PC traces as small as possible:
- from LX pin to L
- from CO to PGND
• If used, connect the trace from the FB pin to R1 and R2 as
close as possible
• Maximize the copper area around the PGND pin
• Place several via holes under the chip to additional ground
plane to improve heat dissipation
The demo board is a good example of layout based on this
outline. Please refer to the EL7536 Application Brief.
7
FN7396.5
August 10, 2005
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