EL4584 Ver la hoja de datos (PDF) - Intersil
Número de pieza
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Fabricante
EL4584 Datasheet PDF : 12 Pages
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EL4584
Where:
Kd = phase detector gain in A/rad
F(s) = loop filter impedance in V/A
KVCO = VCO gain in rad/s/V
N = internal or external divisor
It can be shown that for the loop filter shown below:
C3
=
-K----d---K----V----C----O---,
2
C4
Nω
=
C-----3- ,
10
R3
=
---2----N-----ξ---ω----n----
KdKVCO
n
Where ϖn = loop filter bandwidth, and ζ = loop filter damping
factor.
1. Kd = 300µA/2πrad = 4.77e-5A/rad for the EL4584.
2. The loop bandwidth should be about HSYNC
frequency/20, and the damping ratio should be 1 for
optimum performance. For our example,
ϖn = 15.734kHz/20 = 787Hz≈5000rad/S.
3. N = 910 from table 1.
N = --------V----C-----O-----f--r---e----q---u----e----n----c---y--------- = 1----4---.--3---1----8---1---8----M--- = 910
H – SYNCfrequency 15.73426k
4. KVCO represents how much the VCO frequency changes
for each volt applied at the control pin. It is assumed (but
probably is not) linear about the lock point (2.5V). Its
value depends on the VCO configuration and the varactor
transfer function CV = F(VC), where VC is the reverse
bias control voltage, and CV is varactor capacitance.
Since F(VC) is nonlinear, it is probably best to build the
VCO and measure KVCO about 2.5V. The results of one
such measurement are shown below. The slope of the
curve is determined by linear regression techniques and
equals KVCO. For our example, KVCO = 6.05 Mrad/S/V.
FOSC vs VC, LC VCO
C3
=
-K----d---K----V----C----O---
2
Nω
=
-(--4---.--7---7----e-----–----5----)---(--6---.--0---5----e----6----)
( 910 ) ( 5000 ) 2
=
0.01 µF
n
C4
=
-C----3-
10
=
0.0001 µF
R3
=
---2----N----ζ----ω----n----
KdKVCO
=
--(---2---)---(--9----1---0----)--(---1---)---(--5----0---0---0----)--
(4.77e – 5)(6.05e6)
=
31.5 k Ω
increases, Tθ decreases. For LDET to be low at lock,
|Tθ| < 50 ns. C4 is used mainly to attenuate high
frequency noise from the charge pump.
Lock Time
Let = R3C3. As T increases, damping increases, but so does
lock time. Decreasing T decreases damping and speeds up
loop response, but increases overshoot and thus increases
the number of hunting oscillations before lock. Critical
damping (ζ = 1) occurs at minimum lock time. Because
decreased damping also decreases loop stability, it is
sometimes desirable to design slightly overdamped (ζ > 1),
trading lock time for increased stability.
FIGURE 7. TYPICAL LOOP FILTER
5. Now we can solve for C3, C4, and R3.
We choose R3 = 30kΩ for convenience.
6. Notice R2 has little effect on the loop filter design. R2
should be large, around 100k, and can be adjusted to
compensate for any static phase error Tθ at lock, but if
made too large, will slow loop response. If R2 is made
smaller, Tθ (see timing diagrams) increases, and if R2
LC LOOP FILTER COMPONENTS (APPROXIMATE)
FREQUENCY
R2
R3
C3
C4
(MHZ)
(kΩ)
(kΩ)
(µF)
(µF)
13.301
100
30
0.01
0.001
13.5
100
30
0.01
0.001
14.75
100
33
0.01
0.001
17.734
100
39
0.01
0.001
10.738
100
22
0.01
0.001
12.273
100
27
0.01
0.001
14.318
100
30
0.01
0.001
10
FN7174.2
July 25, 2005
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