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EB381

Migrating from the MC68HC811E2 to the MC68HC11F1

Motorola => Freescale 

Freescale Semiconductor, Inc.

Engineering Bulletin

Difference:

CONFIG Register

The operation of the CONFIG register on the MC68HC811E2 differs

from the MC68HC11F1. See Figure 6, Figure 7, Table 4, and Table 5.

Case 1

Example:

CONFIG register

Issue:

Some of the bits in the CONFIG register have

different meaning.

Change required: The bits in the CONFIG register ($103F) must be

changed to meet the user’s requirements. Bit 3

(NOSEC) is not used and bits 4–7 (EEPROM

mapping) define different address ranges.

Address: $103F

Bit 7

6

5

4

3

2

1

Bit 0

Read:

EE3

EE2

EE1

EE0 NOSEC NOCOP

Write:

EEON

Single-chip reset: 1

1

1

1

U

U

1

1

Bootstrap: 1

1

1

1

U

U(L)

1

1

Expanded: U

U

U

U

1

U

1

U

Test: U

U

U

U

1

U(L)

1

0

= Unimplemented

U indicates a previously programmed bit. U(L) indicates that the bit resets to the logic level held in the latch

prior to reset, but the function of COP is controlled by the DISR bit in TEST1 register.

Figure 6. MC68HC811E2 System Configuration Register (CONFIG)

EE[3:0]

0000

0001

0010

0011

0100

0101

0110

0111

Table 4. MC68HC811E2 EEPROM Mapping

EEPROM Location

$0800–$0FFF

$1800–$1FFF

$2800–$2FFF

$3800–$3FFF

$4800–$4FFF

$5800–$5FFF

$6800–$6FFF

$7800–$7FFF

EE[3:0]

1000

1001

1010

1011

1100

1101

1110

1111

EEPROM Location

$8800–$8FFF

$9800–$9FFF

$A800–$AFFF

$B800–$BFFF

$C800–$CFFF

$D800–$DFFF

$E800–$EFFF

$F800–$FFFF

EB381

10

MOTOROLA

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