K7N801845B-QC13 Ver la hoja de datos (PDF) - Samsung

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Fabricante

K7N801845B-QC13

256Kx36 & 512Kx18 Pipelined NtRAM™

Samsung 

K7N803601B

K7N801801B

PIN CONFIGURATION(TOP VIEW)

256Kx36 & 512Kx18 Pipelined NtRAMTM

DQPc

1

DQc0

2

DQc1

3

VDDQ

4

VSSQ

5

DQc2

6

DQc3

7

DQc4

8

DQc5

9

VSSQ

10

VDDQ

11

DQc6

12

DQc7

13

VDD

14

VDD

15

VDD

16

VSS

17

DQd0

18

DQd1

19

VDDQ

20

VSSQ

21

DQd2

22

DQd3

23

DQd4

24

DQd5

25

VSSQ

26

VDDQ

27

DQd6

28

DQd7

29

DQPd

30

100 Pin TQFP

(20mm x 14mm)

K7N803601B(256Kx36)

K7N803201B(256Kx32)

80

DQPb

79

DQb7

78

DQb6

77

VDDQ

76

VSSQ

75

DQb5

74

DQb4

73

DQb3

72

DQb2

71

VSSQ

70

VDDQ

69

DQb1

68

DQb0

67

VSS

66

VDD

65

VDD

64

ZZ

63

DQa7

62

DQa6

61

VDDQ

60

VSSQ

59

DQa5

58

DQa4

57

DQa3

56

DQa2

55

VSSQ

54

VDDQ

53

DQa1

52

DQa0

51

DQPa

PIN NAME

SYMBOL

PIN NAME

TQFP PIN NO.

SYMBOL

PIN NAME

TQFP PIN NO.

A0 - A17

Address Inputs

ADV

Address Advance/Load

WE

Read/Write Control Input

CLK

Clock

CKE

Clock Enable

CS1

Chip Select

CS2

Chip Select

CS2

Chip Select

BWx(x=a,b,c,d) Byte Write Inputs

OE

Output Enable

ZZ

Power Sleep Mode

LBO

Burst Mode Control

32,33,34,35,36,37,44

45,46,47,48,49,50,81

82,83,99,100

85

88

89

87

98

97

92

93,94,95,96

86

64

31

VDD

VSS

N.C.

DQa0~a7

DQb0~b7

DQc0~c7

DQd0~d7

DQPa~Pd

VDDQ

VSSQ

Power Supply(+3.3V) 14,15,16,41,65,66,91

Ground

17,40,67,90

No Connect

38,39,42,43,84

Data Inputs/Outputs

52,53,56,57,58,59,62,63

68,69,72,73,74,75,78,79

2,3,6,7,8,9,12,13

18,19,22,23,24,25,28,29

51,80,1,30

Output Power Supply 4,11,20,27,54,61,70,77

(3.3V or 2.5V)

Output Ground

5,10,21,26,55,60,71,76

Notes : 1. The pin 84 is reserved for address bit for the 16Mb NtRAM.

2. A0 and A1 are the two least significant bits(LSB) of the address field and set the internal burst counter if burst is desired.

-4-

Nov. 2003

Rev 3.0

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