DSP56303 Ver la hoja de datos (PDF) - Freescale Semiconductor
Número de pieza
componentes Descripción
Fabricante
DSP56303 Datasheet PDF : 292 Pages
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DMA
16
66
3
Triple
Timer
Host
Interface
HI08
Address
Generation
Unit
Six-Channel
DMA Unit
Bootstrap
ROM
Internal
Data
Bus
Switch
ESSI
Interface
SCI
Interface
Peripheral
Expansion Area
Program RAM
4096 × 24 bits
(default)
X Data
RAM
2048 × 24
bits
(default)
YAB
XAB
PAB
DAB
Y Data
RAM
2048 × 24
bits
(default)
Memory
Expansion
Area
External
Address
Bus
Switch
18
Address
24-Bit
DSP56300
Core
DDB
YDB
XDB
PDB
GDB
External
Bus
Interface
and
I-Cache
Control
13
Control
External
Data Bus
Switch
24
Data
EXTAL
XTAL
Clock
Generator
PLL
2
RESET
PINIT/NMI
Program
Interrupt
Controller
Program
Decode
Controller
MODA/IRQA
MODB/IRQB
MODC/IRQC
MODD/IRQD
Power
Management
Program
Address
Generator
Data ALU
24 × 24 + 56 → 56-bit MAC
Two 56-bit Accumulators
56-bit Barrel Shifter
JTAG
OnCE
5
DE
Figure 1-1. DSP56303 Block Diagram
Note: See Section 1.6.6, Internal Memory, on page 1-9 for memory size details.
1.8 DMA
The DMA block has the following features:
Six DMA channels supporting internal and external accesses
One-, two-, and three-dimensional transfers (including circular buffering)
End-of-block-transfer interrupts
Triggering from interrupt lines and all peripherals
Freescale Semiconductor
DSP56303 User’s Manual, Rev. 2
1-11
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