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DS2441

1-Cell Li-Ion Battery Manager

Dallas Semiconductor -> Maxim Integrated 

DS2441

Summary. All of the protection conditions described above are OR'ed together to affect the CHG and

DCHG outputs. Taking the OV, UV and OT bits from the Status Register and considering the OC Status

Register bit to be the logical OR of DOC (discharge overcurrent) and COC (charge overcurrent), the

equations for CHG and DCHG are as follows:

DCHG = OT or DOC or UV or Low Power Mode

CHG = OT or COC or OV or Low Power Mode

LOW POWER MODE

The DS2441 enters Low Power Mode when an undervoltage condition exists on the lithium-ion cell or

when the host system sets the LPM bit in the Control Register. While in Low Power Mode, the DS2441

shuts off the external charge and discharge FETs and turns off most of its internal circuitry to reduce its

load on the cell to IDD1 (1 µA typical). The DS2441 stays in Low Power Mode until it is “awakened” by

the attachment of a charger to the battery pack (voltage on CHG pin > VDD) or a high-to-low transition

on the DQ pin. After either stimulus, the DS2441 powers up fully, makes initial measurements with the

charge and discharge FETs off (to prevent charging until it can verify the cell is not overvoltage), and

then returns to its normal mode of operation.

Charging from Low Power Mode. Charging an undervoltage pack is as simple as applying a charger to

the pack. The presence of the charger automatically triggers the DS2441 to leave Low Power Mode,

make initial measurements with the FETs off, and return to its normal mode of operation. Generally the

DS2441 starts normal operation with the discharge FET off (because the cell is still undervoltage) and the

charge FET on, which allows charging to proceed. If the charger pulls the cell voltage above

undervoltage threshold VUV before the expiration of undervoltage delay tUVD, the DS2441 remains in its

normal mode of operation and charging can continue. If the cell remains below VUV for tUVD, the DS2441

shuts off the charge and discharge FETs, asserts the UV flag, and returns to Low Power Mode. Once

back in Low Power Mode, the presence of the charger again triggers the DS2441 to go back to its normal

mode of operation where charging can continue for at least tUVD. As long as the charger is applied to the

pack, the DS2441 repeatedly cycles between its normal mode of operation (for tUVD) and Low Power

Mode (for approximately 21 ms) until the cell has been charged above VUV. After the cell is above VUV,

the DS2441 remains in its normal mode of operation and charging continues normally.

REFRESHING UNDERVOLTAGE PACKS

In the worst-case undervoltage situation, a battery can be so far discharged that VDD is outside the

specified operating range of the DS2441, leaving the DS2441 without a power supply and unable to allow

the charging necessary to correct the situation. The Refresh bit (RFSH) in the Control Register and the

ability to parasitically steal power from the DQ pin are features that allow any DS2441-based battery

pack to be refreshed from even the deepest undervoltage situation.

Parasite Power. As is the case for many Dallas 1-Wire products, the DS2441 can, using an on-chip

capacitor, parasitically steal enough power from the DQ line to support register and memory accesses

even with no voltage present on the VDD pin. DQ must be pulled up to at least 3V, and maximum pulse

width specifications must be met to ensure proper parasite-powered operation.

Refresh Bit. Setting the RFSH bit in the Control Register to logic 1 causes the DS2441 to mask the

effect of undervoltage on the CHG output, stay in the normal mode of operation (and out of Low Power

Mode), and power all of its circuitry only from the DQ pin. Because all DS2441 circuitry is powered

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