DS2120E Ver la hoja de datos (PDF) - Dallas Semiconductor -> Maxim Integrated

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DS2120E

Ultra3 LVD SCSI Terminator

Dallas Semiconductor -> Maxim Integrated 

DS2120

To maintain the specified regulation, a 4.7µF capacitor is required between the VREF pin and ground of

each DS2120. A high- frequency cap (0.1µF ceramic recommended) can also be placed on the VREF pin

in applications that use fast rise/fall- time drivers. A typical SCSI bus configuration is shown in Figure 2.

DIFFSENS Noise Filtering: The DS2120 incorporates a digital filter to remove high- frequency

transients on the DIFFSENS control line, thereby eliminating erroneous switching between modes. This

filter eliminates the need for the external capacitor and resistor, which previously performed this function.

The external filter can be used in addition to the digital filter if the DS2120 and DS2118M or DS2119M

are to be used interchangeably.

NOTES:

1) DIFFSENS: Refers to the SCSI bus signal.

2) DIFFSENSE: Refers to the Dallas Semiconductor pin name and internal circuitry relating to

differential sensing.

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