DS2117M Ver la hoja de datos (PDF) - Dallas Semiconductor -> Maxim Integrated

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DS2117M

Ultra3 LVD/SE SCSI Terminator

Dallas Semiconductor -> Maxim Integrated 

DS2117M

To ensure proper operation, the TPWR pin should be connected to the SCSI bus TERMPWR line. As

with all analog circuitry, the TERMPWR and VDD lines should be bypassed locally. A 2.2 µF capacitor

and a 0.01 µF high frequency capacitor is recommended between TPWR and ground and placed as close

as possible to the DS2117M. The DS2117M should be placed as close as possible to the SCSI connector

to minimize signal and power trace length, thereby resulting in less input capacitance and reflections

which can degrade the bus signals.

To maintain the specified regulation, a 4.7 µF capacitor is required between the Vref pin (VREF) and

ground of each DS2117M. A high frequency cap (0.1 µF ceramic recommended) can also be placed on

the Vref pin in applications that use fast rise/fall time drivers. A typical SCSI bus configuration is shown

in Figure 2.

DIFFSENS noise filtering The DS2117M incorporates a digital filter to remove high frequency

transients on the DIFFSENS control line, thereby eliminating erroneous switching between modes. This

filter eliminates the need for the external capacitor and resistor, which heretofore performed this function.

The external filter may be used in addition to the digital filter if the DS2117M and DS2118M are to be

used interchangeably.

NOTE:

DIFFSENS – Refers to the SCSI bus signal.

DIFFSENSE – Refers to the DS2117M pin name and internal circuitry capable of driving the

DIFFSENS line.

DIFF_CAP - Refers to the DS2117M pin name and internal circuitry relating to monitoring the

DIFFSENS line.

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