DS1846 Ver la hoja de datos (PDF) - Maxim Integrated

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DS1846

NV Tri-Potentiometer, Memory, and MicroMonitor

Maxim Integrated 

2-WIRE OPERATION

DS1846

Clock and Data Transitions: The SDA pin is normally pulled high with an external resistor or device.

Data on the SDA pin may only change during SCL low time periods. Data changes during SCL high

periods indicates a start or stop condition depending on the conditions discussed below. See the timing

diagrams for further details (Figures 2 and 3).

Start Condition: A high-to-low transition of SDA with SCL high is a start condition, which must

precede any other command. See the timing diagrams for further details (Figures 2 and 3).

Stop Condition: A low-to-high transition of SDA with SCL high is a stop condition. After a read

sequence, the stop command places the DS1846 into a low-power mode. See the timing diagrams for

further details (Figures 2 and 3).

Acknowledge: All address and data bytes are transmitted through a serial protocol. The DS1846 pulls the

SDA line low during the ninth clock pulse to acknowledge that it has received each word.

Standby Mode: The DS1846 features a low-power mode that is automatically enabled after power-on,

after a stop command, and after the completion of all internal operations.

Memory Reset: After any interruption in protocol, power loss, or system reset, the following steps reset

the DS1846:

1) Clock up to nine cycles.

2) Look for SDA high in each cycle while SCL is high.

3) Create a start condition while SDA is high.

Device Addressing: The DS1846 must receive an 8-bit device address word following a start condition

to enable a specific device for a read or write operation. The address word is clocked into the DS1846

MSB to LSB. The address word consists of 101000 binary followed by A0 then the R/W bit. If the R/W

bit is high, a read operation is initiated. If the R/W bit is low, a write operation is initiated. For a device

to become active, the value of A0 must be the same as the hard-wired address pins on the DS1846. Upon

a match of written and hard-wired addresses, the DS1846 outputs a zero for one clock cycle as an

acknowledge. If the address does not match the DS1846 returns to a low-power mode.

Write Operations: After receiving a matching device address byte with the R/W bit set low, the device

goes into the write mode of operation. The master must transmit an 8-bit EEPROM memory address to

the device to define the address where the data is to be written. After the byte has been received, the

DS1846 transmits a zero for one clock cycle to acknowledge the memory address has been received. The

master must then transmit an 8-bit data word to be written into this memory address. The DS1846 again

transmits a zero for one clock cycle to acknowledge the receipt of the data byte. At this point, the master

must terminate the write operation with a stop condition. The DS1846 then enters an internally timed

write process tw to the EEPROM memory. All inputs other than those controlling the MicroMonitor are

disabled during this write cycle.

The DS1846 is capable of an 8-byte page write. A page write is initiated the same way as a byte write, but

the master does not send a stop condition after the first data byte. Instead, after the slave acknowledges

the data byte has been received, the master can send up to seven more data bytes using the same nine-

clock sequence. After a write to the last byte in the page, the address returns to the beginning of the same

page. The master must then terminate the write cycle with a stop condition or the data clocked into the

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