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DS1846 Ver la hoja de datos (PDF) - Maxim Integrated

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DS1846 Datasheet PDF : 18 Pages
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DS1846
The EEPROM memory allows a user to store configuration or calibration data for a specific system or
device and provides control of the potentiometer wiper settings. Any type of user information can reside
in the first 248 bytes (00h to F7h) of this memory. The next three bytes of memory (F8h to FAh) are for
potentiometer settings and the last five addresses of EEPROM memory (FBh to FFh) are reserved. These
reserved and potentiometer registers should not be used for data storage. Access to this EEPROM is
through an industry-standard 2-wire bus. The interface I/O pins consist of SDA and SCL. The wiper
positions of the DS1846, as well as EEPROM data, can be hardware write-protected using the WP input
pin.
The MicroMonitor is a precision temperature-compensated reference and comparator that monitors
certain vital status conditions for a microprocessor. When a sense input detects an out-of-tolerance (VCC)
condition, a nonmaskable interrupt is generated. As the voltage at the device degrades, an internal power-
fail signal is generated that can be used to reset the processor. When VCC returns to an in-tolerance level,
the reset signal is kept in the active state for a minimum time of tRST to allow for the stabilization of the
power supply and the microprocessor. The MicroMonitor also functions as a pushbutton reset control.
The pushbutton input is debounced internally and generates an active pulse width of tRST minimum.
DS1846 BLOCK DIAGRAM Figure 1
SCL
SDA
WP
A0
2-Wire
Interface
Data
DS1846
EEPROM
5 Reserved
Bytes
FBh-FFh
Potentiometer 2
FAh
Potentiometer 0
F9h
Potentiometer 1
F8h
Nonvolatile
Digital Potentiometer
VCC
RPBR
User EPROM
248 Bytes
00h-F7h
MicroMonitor
PBRST
VCC
VCCTP
Timer
Delay
Potentiometer 2
10kW
H2
Addr FAh
W2
100-Positions
L2
Potentiometer 0
10kW
H0
Addr F9h
W0
100-Positions
L0
Potentiometer 1
100kW
H1
Addr F8h
W1
256-Positions
L1
RST
RST
VCC
IN
VTP
Timer
Delay
2.4kW
typical
NMI
2 of 18

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