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DG408L(2016) Ver la hoja de datos (PDF) - Vishay Semiconductors

Número de pieza
componentes Descripción
Fabricante
DG408L
(Rev.:2016)
Vishay
Vishay Semiconductors Vishay
DG408L Datasheet PDF : 16 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
www.vishay.com
DG408L, DG409L
Vishay Siliconix
SPECIFICATIONS (Dual Supply V+ = 5 V, V - = -5 V)
PARAMETER
Analog Switch
SYMBOL
TEST CONDITIONS
UNLESS OTHERWISE
SPECIFIED
V+ = 5 V, ± 10 %, V- = -5 V
VEN = 0.6 V or 2.4 V f
TEMP. b
TYP. d
A SUFFIX
D SUFFIX
-55 °C to +125 °C -40 °C to +85 °C
MIN. c MAX. c MIN. c MAX. c
UNIT
Analog Signal Range e
VANALOG
Full
-
-5
5
-5
5
V
Drain-Source
On-Resistance
RDS(on)
VD = ± 3.5 V, IS = 10 mA,
sequence each switch on
Room 20
Full
-
-
-
40
50
-
-
40
50
Switch Off Leakage
Current a
IS(off)
ID(off)
Room
-
-1
1
-1
1
V+ = 5.5, V- = 5.5 V
Full
-
-15
15
-10
10
VEN = 0 V, VD = ± 4.5 V,
VS = ± 4.5 V
Room
-
Full
-
-1
1
-1
1
-15
15
-10
10
nA
Channel On Leakage
Current a
Digital Control
ID(on)
V+ = 5.5 V, V- = -5.5 V,
Room
-
VEN = 2.4 V, VD = ± 4.5 V,
VS = ± 4.5 V
Full
-
-1
1
-1
1
-15
15
-10
10
Logic High Input Voltage
VINH
Full
Logic Low Input Voltage
VINL
Full
Input Current a
IIN
VAX = VEN = 2.4 V or 0.6 V
Full
Dynamic Characteristics
-
2.4
-
2.4
-
V
-
-
0.6
-
0.6
-
-1.5
1.5
-1
1
μA
Transition Time e
VS1 = 3.5 V, VS8 = 0 V, (DG408L) Room
30
-
60
-
60
tTRANS VS1b = 3.5 V, VS4b = 0 V, (DG409L)
see figure 2
Full
-
-
78
-
65
Break-Before-Make Time e tOPEN
VS(all) = VDA = 3.5 V,
Room
8
1
-
1
-
see figure 4
Full
-
-
-
-
-
ns
Room 25
-
55
-
55
Enable Turn-On Time e
tON(EN) VAX = 0 V, VS1 = 3.5 V (DG408L)
Full
-
-
68
-
60
Enable Turn-Off Time e
tOFF(EN)
VAX = 0 V, VS1b = 3.5 V (DG409L)
see figure 3
Room
Full
20
-
-
-
40
50
-
-
40
45
Source Off Capacitance e CS(off) f = 1 MHz, VS = 0 V, VEN = 0 V Room
6
-
-
-
-
Drain Off Capacitance e
CD(off) f = 1 MHz, VD = 0 V, VEN = 0 V Room
15
-
-
-
-
pF
Drain On Capacitance e
CD(on) f = 1 MHz, VD = 0 V, VEN = 2.4 V Room
29
-
-
-
-
Notes
a. Leakage parameters are guaranteed by worst case test condition and not subject to production test.
b. Room = 25 °C, full = as determined by the operating temperature suffix.
c. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this datasheet.
d. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
e. Guaranteed by design, not subject to production test.
f. VIN = input voltage to perform proper function.
g. RDS(on) = RDS(on) max. - RDS(on) min.
h. Worst case isolation occurs on channel 4 do to proximity to the drain pin.
i. RDS(on) flatness is measured as the difference between the minimum and maximum measured values across a defined Analog signal.
S16-0276-Rev. J, 22-Feb-16
4
Document Number: 71342
For technical questions, contact: analogswitchsupport@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000

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