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DG2730(2011) Ver la hoja de datos (PDF) - Vishay Semiconductors

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DG2730 Datasheet PDF : 9 Pages
1 2 3 4 5 6 7 8 9
DG2730
Vishay Siliconix
TEST CIRCUITS
Switch
Input
Logic
Input
V+
HSD1± V+
or HSD2±
S
GND OE
0V
Switch Output
VOUT
RL
50 Ω
CL
35 pF
Logic
Input
Switch
Output
CL (includes fixture and stray capacitance)
( ) VOUT =
RL
RL + RON
Figure 1. Switching Time
VINH
VINL
50 %
tr < 5 ns
tf < 5 ns
0.9 x VOUT
0V
tON
tOFF
Logic "1" = Switch on
Logic input waveforms inverted for switches that have
the opposite logic sense.
V+
VHSD1±
VHSD2±
V+
HSD1±
HSD2±
S
GND OE
RL
50 Ω
VO
CL
35 pF
Logic
Input
VINH
VINL
HSD1± = HSD2±
VO
Switch 0 V
Output
90 %
tD
tr < 5 ns
tf < 5 ns
tD
CL (includes fixture and stray capacitance)
Figure 2. Break-Before-Make Interval
V+
Vgen
Rgen
+
VIN = 0 - V+
HSD1± V+
or HSD2±
OE
GND S
VOUT
CL = 1 nF
VOUT
IN
On
VOUT
Off
On
Q = OUT x CL
Figure 3. Charge Injection
IN depends on switch configuration: input polarity
determined by sense of switch.
www.vishay.com
Document Number: 67786
6
S11-1774-Rev. C, 05-Sep-11
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000

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