PE3238-21 Ver la hoja de datos (PDF) - Peregrine Semiconductor
Número de pieza
componentes Descripción
Fabricante
PE3238-21 Datasheet PDF : 15 Pages
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PE3238
Product Specification
Table 6. AC Characteristics: VDD = 3.0 V, -40° C < TA < 85° C, unless otherwise specified
Symbol
Parameter
Conditions
Min
Max
Units
Control Interface and Latches (see Figures 4, 5, 6)
fClk
Serial data clock frequency
tClkH
Serial clock HIGH time
tClkL
Serial clock LOW time
tDSU
Sdata set-up time to Sclk rising edge, D[7:0] set-up time to
M1_WR, M2_WR, A_WR rising edge
tDHLD
Sdata hold time after Sclk rising edge, D[7:0] hold time to
M1_WR, M2_WR, A_WR, E_WR rising edge
tPW
S_WR, M1_WR, M2_WR, A_WR, E_WR pulse width
tCWR
Sclk rising edge to S_WR rising edge. S_WR, M1_WR,
M2_WR, A_WR falling edge to Hop_WR rising edge
tCE
Sclk falling edge to E_WR transition
tWRC
S_WR falling edge to Sclk rising edge. Hop_WR falling
edge to S_WR, M1_WR, M2_WR, A_WR rising edge
tEC
E_WR transition to Sclk rising edge
Main Divider (Including Prescaler)
(Note 1)
10
MHz
30
ns
30
ns
10
ns
10
ns
30
ns
30
ns
30
ns
30
ns
30
ns
Fin
Operating frequency
PFin
Input level range
Main Divider (Prescaler Bypassed)
External AC coupling
200
1500
MHz
-10
5
dBm
Fin
Operating frequency
PFin
Input level range
Reference Divider
External AC coupling
20
220
MHz
-5
5
dBm
fr
Operating frequency
Pfr
Reference input power (Note 2)
Phase Detector
(Note 3)
Single ended input
100
MHz
-2
dBm
fc
Comparison frequency
(Note 3)
SSB Phase Noise (Fin = 1.3 GHz, fr = 10 MHz, fc = 1.25 MHz, LBW = 70 kHz, VDD = 3.0 V, Temp = -40° C)
100 Hz Offset
1 kHz Offset
20
MHz
-75
dBc/Hz
-85
dBc/Hz
Note 1:
Note 2:
Note 3:
Fclk is verified during the functional pattern test. Serial programming sections of the functional pattern are clocked at 10 MHz to verify Fclk
specification.
CMOS logic levels can be used to drive reference input if DC coupled. Voltage input needs to be a minimum of 0.5 Vp-p. For optimum
phase noise performance, the reference input falling edge rate should be faster than 80mV/ns.
Parameter is guaranteed through characterization only and is not tested.
©2003-2005 Peregrine Semiconductor Corp. All rights reserved.
Page 6 of 15
Document No. 70-0031-03 │ UltraCMOS™ RFIC Solutions
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