CY7C68003-24LQXI Ver la hoja de datos (PDF) - Cypress Semiconductor
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CY7C68003-24LQXI Datasheet PDF : 30 Pages
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CY7C68003
Pinouts
TX2UL is available in 20-ball WLCSP and 24-pin QFN package. The pin assignment is shown in Figure 4 and Figure 5
Figure 4. Pin Assignment - TX2UL 20-Ball WLCSP (Top View)
1
2
3
4
5
A
A1
A2
VCC
XI
A3
DP
A4
A5
DM
VBATT
B
B1
NXT
B2
RESET_N
B3
VSS
B4
DATA[4]
B5
VCC
C
C1
C2
C3
C4
C5
DIR
STP
DATA[6]
DATA[2]
DATA[0]
D
D1
CLOCK
D2
DATA[7]
D3
DATA[5]
D4
DATA[3]
D5
DATA[1]
Table 7. Pin Definitions - TX2UL 20-Ball WLCSP
Name Ball No. Type
ULPI Link Interface
Voltage
Description
DATA[0]
C5
I/O
1.8 V
ULPI data to/from link
DATA[1]
D5
I/O
1.8 V
ULPI data to/from link
DATA[2]
C4
I/O
1.8 V
ULPI data to/from link
DATA[3]
D4
I/O
1.8 V
ULPI data to/from link
DATA[4]
DATA[5]
DATA[6]
DATA[7]
CLOCK
B4
I/O
D3
I/O
C3
I/O
D2
I/O
D1
O
1.8 V
1.8 V
1.8 V
1.8 V
1.8 V
ULPI data to/from link
ULPI data to/from link
ULPI data to/from link
ULPI data to/from link
ULPI clock
NXT
B1
O
1.8 V
ULPI next signal
STP
C2
I
1.8 V
ULPI stop signal
DIR
C1
O
1.8 V
ULPI direction
USB
DP
A3
I/O
DM
A4
I/O
Miscellaneous
RESET_N
B2
I
USB
USB
1.8 V
USB D-plus signal
USB D-minus signal
Global reset. When RESET_N is asserted during the VCC power on, TX2UL enters
configuration mode. During normal operation mode, asserting RESET_N resets the
TX2UL and enter into the power saving mode.
XI
A2
I
1.8 V
LVCMOS single ended clock of frequency 13, 19.2, 24, or 26 MHz
POWER and GROUND
VCC
B5, A1
VBATT
A5
VSS
B3
Power
Power
GND
1.8 V
3.0 - 5.775 V
0V
Low voltage supply for the digital core and I/O
High voltage supply for USB
Common ground
Document Number: 001-15775 Rev. *L
Page 7 of 30
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