CY7C185D-15VXC Ver la hoja de datos (PDF) - Cypress Semiconductor
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CY7C185D-15VXC Datasheet PDF : 10 Pages
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PRELIMINARY
CY7C185D
Thermal Resistance[4]
Parameter
ΘJA
ΘJC
Description
Thermal Resistance
(Junction to Ambient)[4]
Thermal Resistance
(Junction to Case)[4]
Test Conditions
Still Air, soldered on a 3 × 4.5 inch, two-layer
printed circuit board
All-Packages
TBD
TBD
Unit
°C/W
°C/W
AC Test Loads and Waveforms
10-ns Device
OUTPUT
Z = 50Ω
* CAPACITIVE LOAD CONSISTS
OF ALL COMPONENTS OF THE
TEST ENVIRONMENT
50 Ω
1.5V
(a)
30 pF*
3.0V
GND
10%
ALL INPUT PULSES
90%
90%
10%
≤ 3 ns
12, 15-ns Devices
R1 481 Ω
5V
OUTPUT
High-Z characteristics:
5V
OUTPUT
≤ 3 ns
R1 481 Ω
Equivalent to: THÉVENIN EQUIVALENT
30 pF
OUTPUT
167Ω
1.73V
INCLUDING
JIG AND
SCOPE (b)
Switching Characteristics Over the Operating Range [6]
R2
255Ω
5 pF
INCLUDING
JIGAND
SCOPE (c)
R2
255Ω
7C185D-10
7C185D-12
7C185D-15
Parameter
Description
Min. Max. Min. Max. Min. Max. Unit
Read Cycle
tpower[5]
VCC(typical) to the first access
100
100
100
µs
tRC
Read Cycle Time
10
12
15
ns
tAA
Address to Data Valid
10
12
15
ns
tOHA
Data Hold from Address Change
3
3
3
ns
tACE1
CE1 LOW to Data Valid
10
12
15
ns
tACE2
CE2 HIGH to Data Valid
10
12
15
ns
tDOE
OE LOW to Data Valid
5
6
8
ns
tLZOE
tHZOE
tLZCE1
OE LOW to Low Z
OE HIGH to High Z[7]
CE1 LOW to Low Z[8]
3
3
3
ns
5
6
7
ns
3
3
3
ns
tLZCE2
tHZCE
CE2 HIGH to Low Z
CE1 HIGH to High Z[7, 8]
CE2 LOW to High Z
3
3
3
ns
5
6
7
ns
tPU
CE1 LOW to Power-Up
0
0
0
ns
CE2 to HIGH to Power-Up
tPD
CE1 HIGH to Power-Down
CE2 LOW to Power-Down
10
12
15
ns
Notes:
5. tPOWER gives the minimum amount of time that the power supply should be at typical VCC values until the first memory access can be performed.
6. Test conditions assume signal transition time of 3 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V, and output loading of the specified
IOL/IOH and 30-pF load capacitance.
7. tHZOE, tHZCE, and tHZWE are specified with CL = 5 pF as in part (b) of AC Test Loads. Transition is measured ±200 mV from steady state voltage.
8. At any given temperature and voltage condition, tHZCE is less than tLZCE1 and tLZCE2 for any given device.
Document #: 38-05466 Rev. *C
Page 4 of 10
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