CY7C1355C-100AC Ver la hoja de datos (PDF) - Cypress Semiconductor
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CY7C1355C-100AC
Cypress Semiconductor
CY7C1355C-100AC Datasheet PDF : 32 Pages
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PRELIMINARY
CY7C1355C
CY7C1357C
Truth Table[2, 3, 4, 5, 6, 7, 8]
Operation
Deselect Cycle
Address
Used CE1 CE2 CE3 ZZ ADV/LD WE BWX OE CEN CLK
DQ
None H X X L
L
X
X
X
L L->H Three-State
Deselect Cycle
None X X H L
L
X
X
X
L L->H Three-State
Deselect Cycle
None X L X L
L
X
X
X
L L->H Three-State
Continue Deselect Cycle
None X X X L
H
X
X
X
L L->H Three-State
READ Cycle
(Begin Burst)
External L H L L
L
H
X
L
L L->H Data Out (Q)
READ Cycle
(Continue Burst)
Next X X X L
H
X
X
L
L L->H Data Out (Q)
NOP/DUMMY READ
(Begin Burst)
External L H L L
L
H
X
H
L L->H Three-State
DUMMY READ
(Continue Burst)
Next X X X L
H
X
X
H
L L->H Three-State
WRITE Cycle
(Begin Burst)
External L H L L
L
L
L
X
L L->H Data In (D)
WRITE Cycle
(Continue Burst)
Next X X X L
H
X
L
X
L L->H Data In (D)
NOP/WRITE ABORT
(Begin Burst)
None L H L L
L
L
HX
L L->H Three-State
WRITE ABORT
(Continue Burst)
Next X X X L
H
X
HX
L L->H Three-State
IGNORE CLOCK
EDGE (Stall)
Current X X X L
X
X
X
X
H L->H
-
SLEEP MODE
None X X X H
X
X
X
X
X X Three-State
Notes:
2. X = “Don't Care.” H = Logic HIGH, L = Logic LOW. BWx = L signifies at least one Byte Write Select is active, BWx = Valid signifies that the desired Byte Write
Selects are asserted, see Truth Table for details.
3. Write is defined by BWX, and WE. See Truth Table for Read/Write.
4. When a Write cycle is detected, all I/Os are three-stated, even during Byte Writes.
5. The DQs and DQPX pins are controlled by the current cycle and the OE signal. OE is asynchronous and is not sampled with the clock.
6. CEN = H, inserts wait states.
7. Device will power-up deselected and the I/Os in a three-state condition, regardless of OE.
8. OE is asynchronous and is not sampled with the clock rise. It is masked internally during Write cycles. During a Read cycle DQs and DQPX = Three-state when
OE is inactive or when the device is deselected, and DQs and DQPX = data when OE is active.
9. Table only lists a partial listing of the byte write combinations. Any combination of BWX is valid. Appropriate write will be done based on which byte write is active.
Document #: 38-05539 Rev. **
Page 11 of 33
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