CY7C1351G Ver la hoja de datos (PDF) - Cypress Semiconductor

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componentes Descripción

Fabricante

CY7C1351G

4-Mbit (128K x 36) Flow-through SRAM with NoBL™ Architecture

Cypress Semiconductor 

CY7C1351G

Capacitance[12]

Parameter

Description

CIN

CCLOCK

CI/O

Input Capacitance

Clock Input Capacitance

I/O Capacitance

Thermal Resistance[12]

Test Conditions

TA = 25°C, f = 1 MHz,

VDD = 3.3V

VDDQ=3.3V

Parameters

ΘJA

ΘJC

Description

Thermal Resistance

(Junction to Ambient)

Thermal Resistance

(Junction to Case)

Test Conditions

Test conditions follow standard test

methods and procedures for

measuring thermal impedance, per

EIA/JESD51.

100 TQFP

Max.

5

5

5

100 TQFP

Package

30.32

6.85

119 BGA

Max.

Unit

5

pF

5

pF

7

pF

119 BGA

Package

34.1

Unit

°C/W

14.0

°C/W

AC Test Loads and Waveforms

3.3V I/O Test Load

OUTPUT

Z0 = 50Ω

3.3V

OUTPUT

RL = 50Ω

5 pF

VT = 1.5V

(a)

2.5V I/O Test Load

INCLUDING

JIG AND

SCOPE

R = 317Ω

R = 351Ω

(b)

VDDQ

GND

ALL INPUT PULSES

10%

90%

≤ 1ns

90%

10%

≤ 1ns

(c)

OUTPUT

Z0 = 50Ω

2.5V

OUTPUT

RL = 50Ω

5 pF

VT = 1.25V

R = 1667Ω

R = 1538Ω

VDDQ

GND

10%

≤ 1ns

ALL INPUT PULSES

90%

INCLUDING

(a)

JIG AND

SCOPE

(b)

(c)

Note:

12. Tested initially and after any design or process changes that may affect these parameters.

90%

10%

≤ 1ns

Document #: 38-05513 Rev. *D

Page 8 of 14

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