CY7C1340A-66 Ver la hoja de datos (PDF) - Cypress Semiconductor

Número de pieza

componentes Descripción

Fabricante

CY7C1340A-66

128K x 32 Synchronous-Pipelined RAM

Cypress Semiconductor 

CY7C1340A

Switching Waveforms

Read Timing[27]

CLK

ADSP#

ADSC#

ADDRESS

BW1#, BW2#,

BW3#, BW4#,

BWE#, GW#

tS

tH

tS

A1

tH

tKC

tKL

tKH

A2

tS

CE#

ADV#

OE#

DQ

tS

tH

tKQ

tKQLZ

tOELZ

tOEQ

tKQ

Q(A1)

Q(A2)

Q(A2+1)

SINGLE READ

Note:

27. CE active in this timing diagram means that all chip enables CE, CE2, and CE2 are active.

Q(A2+2)

Q(A2+3) Q(A2) Q(A2+1)

BURST READ

Document #: 38-05153 Rev. *C

Page 8 of 12

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