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MB91121 Ver la hoja de datos (PDF) - Fujitsu

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componentes Descripción
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MB91121 Datasheet PDF : 97 Pages
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MB91121
s PIN DESCRIPTION
Pin no.
1
2
3
4
5
6
7
8
9
Pin name
A17/P61
A18/P62
A19/P63
A20/P64
A21/P65
A22/P66
A23/P67
A24
AVCC
10 AVRH
11 AVSS/AVRL
12 to 19 AN0 to AN7
20 to 23
OCPA0/PH4
OCPA1/PH5
OCPA2/PH6
OCPA3/PH7
25 to 32
INT0/PG0
INT1/PG1
INT2/PG2
INT3/PG3
INT4/PG4/TRG0
INT5/PG5/TRG1
INT6/PG6/TRG2
INT7/PG7/TRG3
33 SI0/PF0
35 SO0/PF1
36 SC0/PF2
Circuit type
Function
Bits 16 to 23 for the external address bus.
F
When not used for the address bus, these pins serve as ports (P60
to P67) .
M
Bit 24 for the external address bus
A/D converter VCC power supply
A/D converter reference voltage (high potential side)
The VCC pin must be applied with voltage equal to or higher than
the voltage at this pin (AVRH) when the AVRH pin is turned on or
off.
A/D converter VSS power supply or reference voltage (low potential
side)
N
[AN0 to AN7] A/D converter analog input. This function is enabled
with the AIC register set for the analog input.
[OCPA0 to OCPA3] PWM timer output. This function is enabled
F
with the PWM timer output flag set to “Enabled”.
[PH4 to PH7] General-purpose I/O port
[INT0 to INT7] External inter- Since these inputs are used dur-
rupt request input
ing their respective input opera-
tions, the output by the other
F
[TRG0 to TRG3] PWM timer function must remain off unless
external trigger input
used intentionally.
[PG0 to PG7] General-purpose I/O port
[SI0] UART0 data input. Since this input is used whenever
UART0 is in input operation, the output by the other function must
F
remain off unless used intentionally.
[PF0] General-purpose I/O port
[SO0] UART0 data output. This function is enabled with the
UART0 data output flag set to “Enabled”.
F
[PF1] General-purpose I/O port. This function is enabled with the
UART0 data output flag set to “Disabled”.
[SC0] UART0 clock input/output. The clock output is enabled with
the UART0 clock output flag set to “Enabled”.
F
[PF2] General-purpose I/O port. This function is enabled with the
UART0 clock output flag set to “Disabled”.
(Continued)
6

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