CY7C037AV-20AXC(2011) Ver la hoja de datos (PDF) - Cypress Semiconductor
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componentes Descripción
Fabricante
CY7C037AV-20AXC Datasheet PDF : 22 Pages
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CY7C027V/027AV/028V
CY7C037AV/038V
Switching Waveforms
Figure 4. Read Cycle No. 1 (Either Port Address Access)[23, 24, 25]
tRC
ADDRESS
DATA OUT
tAA
tOHA
PREVIOUS DATA VALID
DATA VALID
tOHA
CE and
LB or UB
OE
DATA OUT
ICC
CURRENT
ISB
ADDRESS
UB or LB
CE
DATA OUT
Figure 5. Read Cycle No. 2 (Either Port CE/OE Access)[23, 26, 27]
tACE
tDOE
tLZOE
tLZCE
tPU
tHZCE
tHZOE
DATA VALID
tPD
Figure 6. Read Cycle No. 3 (Either Port)[23, 25, 26, 27]
tRC
tAA
tOHA
tLZCE
tABE
tACE
tLZCE
tHZCE
tHZCE
Notes
23. R/W is HIGH for read cycles.
24. Device is continuously selected CE = VIL and UB or LB = VIL. This waveform cannot be used for semaphore reads.
25. OE = VIL.
26. Address valid prior to or coincident with CE transition LOW.
27. To access RAM, CE = VIL, UB or LB = VIL, SEM = VIH. To access semaphore, CE = VIH, SEM = VIL.
Document #: 38-06078 Rev. *E
Page 10 of 22
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