29F0408RPFI Ver la hoja de datos (PDF) - MAXWELL TECHNOLOGIES
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29F0408RPFI Datasheet PDF : 32 Pages
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32 Megabit (4M x 8-Bit) Flash Memory
29F0408
TABLE 11. 29F0408 AC CHARACTERISTICS FOR OPERATION
(VCC = 5 V ± 10%, TA = -40 TO +125°C, UNLESS OTHERWISE NOTED)
PARAMETER
SYMBOL
SUBGROUPS
MIN
MAX
UNIT
CE low to status output
tCSTO
9, 10, 11
--
45
ns
RE high to WE low
RHWY
9, 10, 11
0
--
ns
WE high to RE low
tWHR
9, 10, 11
60
--
ns
RE access time (read ID)
tREADID
9, 10, 11
--
35
ns
Device resetting time (read/program/erase/after
erase suspend)
tRST
9, 10, 11
--
5/10/500
µs
1. Not Tested
2. If CE goes high within 30 ns after the rising edge of the last RE, R/B will not return to VOL.
3. The time to Ready depends on the value of the pull-up resistor tied to R/B pin.
4. To break the sequential read cycle, CE must be held high for longer than tCEH.
TABLE 12. 29F0408 VALID BLOCK 1,2
PARAMETER
SYMBOL
MIN
TYP
MAX
UNIT
Valid Block Number
NVB
502
508
512
Blocks
1. The device may include valid blocks. Invalid blocks are defined as blocks that contain one or more bad bits. Do not try to
access these invalid blocks for program and erase. During its lifetime of 10 years and/or 1 million program/erase cycles, the
minimum number of valid blocks are guaranteed though its initial number could be reduced. (Refer to following technical note)
2. The 1st block, which is placed on the 00h block address, is guaranteed to be a valid block.
NAND FLASH TECHNICAL NOTES
Invalid Block(s)
Invalid blocks are defined as blocks that contain one or more invalid bits whose reliability is not guaranteed by the
manufacturer. Typically, an invalid block will contain a single bad bit. The information regarding the invalid block(s) is
called as the invalid block information. The invalid block information is written to the 1st or the 2nd page of the invalid
block(s) with 00h data. Devices with invalid block(s) have the same quality level as devices with all valid blocks and
have the same AC and DC characteristics. An invalid block(s) does not affect the performance of valid block(s)
because it is isolated from the bit line and the common source line by a select transistor. The system design must be
able to mask out the invalid block(s) via address mapping. The 1st block of the NAND Flash, however, is fully guaran-
teed to be a valid block.
Identifying Invalid Block(s)
All device locations are erased (FFh) except locations where the invalid block information is written prior to shipping.
Since the invalid block information is also erasable in most cases, it is impossible to recover the information once it
has been erased. Therefore, the system must be able to recognize the invalid block(s) based on the original invalid
11.08.02 Rev 2
All data sheets are subject to change without notice 7
©2002 Maxwell Technologies
All rights reserved.
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