CY14C101Q2A-S104XI Ver la hoja de datos (PDF) - Cypress Semiconductor

Número de pieza

componentes Descripción

Fabricante

CY14C101Q2A-S104XI

1-Mbit (128 K × 8) Serial (SPI) nvSRAM

Cypress Semiconductor 

CY14C101Q

CY14B101Q, CY14E101Q

SPI Functional Description

The CY14X101Q uses an 8-bit instruction register. Instructions

and their opcodes are listed in Table 2. All instructions,

addresses, and data are transferred with the MSB first and start

with a HIGH to LOW CS transition. There are, in all, 18 SPI

instructions which provide access to most of the functions in

nvSRAM. Further, the WP, HOLD and HSB pins provide

additional functionality driven through hardware.

Table 2. Instruction Set

Instruction Category

Instruction Name

Status Register Control Instructions

RDSR

Status Register access

FAST_RDSR

WRSR

WREN

Write protection and block protection

WRDI

SRAM Read/Write Instructions

READ

Memory access

FAST_READ

WRITE

Special NV Instructions

STORE

nvSRAM special functions

RECALL

ASENB

ASDISB

Special Instructions

Sleep

SLEEP

WRSN

Serial number

RDSN

FAST_RDSN

Device ID read

RDID

FAST_RDID

Opcode

0000 0101

0000 1001

0000 0001

0000 0110

0000 0100

0000 0011

0000 1011

0000 0010

0011 1100

0110 0000

0101 1001

0001 1001

1011 1001

1100 0010

1100 0011

1100 1001

1001 1111

1001 1001

Reserved

- Reserved -

0001 1110

Operation

Read Status Register

Fast Status Register read - SPI clock >40 MHz

Write Status Register

Set write enable latch

Reset write enable latch

Read data from memory array

Fast read - SPI clock >40 MHz

Write data to memory array

Software STORE

Software RECALL

AutoStore Enable

AutoStore Disable

Sleep mode enable

Write serial number

Read serial number

Fast serial number read - SPI clock > 40 MHz

Read manufacturer JEDEC ID and product ID

Fast manufacturer JEDEC ID and product ID Read - SPI

clock > 40 MHz

The SPI instructions are divided based on their functionality in

the following types:

❐ Status Register control instructions:

• Status Register access: RDSR, FAST_RDSR and WRSR

instructions

• Write protection and block protection: WREN and WRDI

instructions along with WP pin and WEN, BP0, and BP1

bits

❐ SRAM read/write instructions

• Memory access: READ, FAST_READ and WRITE

instructions

❐ Special NV instructions

• nvSRAM special instructions: STORE, RECALL, ASENB,

and ASDISB

❐ Special instructions

• SLEEP, WRSN, RDSN, FAST_RDSN, RDID, FAST_RDID

Document #: 001-54393 Rev. *F

Page 9 of 34

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