CY14B101P-SFXIT(2012) Ver la hoja de datos (PDF) - Cypress Semiconductor

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CY14B101P-SFXIT
(Rev.:2012)

1-Mbit (128 K × 8) Serial SPI nvSRAM with Real Time Clock

Cypress Semiconductor 

CY14B101P

1-Mbit (128 K × 8) Serial SPI nvSRAM

with Real Time Clock

1-Mbit (128 K × 8) Serial SPI nvSRAM with Real Time Clock

Features

■ 1-Mbit nonvolatile static random access memory (nvSRAM)

❐ Internally organized as 128 K × 8

❐ STORE to QuantumTrap nonvolatile elements initiated

automatically on power-down (AutoStore) or by user using

HSB pin (Hardware STORE) or SPI instruction (Software

STORE)

❐ RECALL to SRAM initiated on power-up (Power-up

RECALL) or by SPI instruction (Software RECALL)

❐ Automatic STORE on power-down with a small capacitor

■ High reliability

❐ Infinite read, write, and RECALL cycles

❐ 1 million STORE cycles to QuantumTrap

❐ Data retention: 20 years

■ Real time clock (RTC)

❐ Full featured real time clock

❐ Watchdog timer

❐ Clock alarm with programmable interrupts

❐ Capacitor or battery backup for RTC

❐ Backup current of 0.35 µA (Typical)

■ High speed serial peripheral interface (SPI)

❐ 40 MHz clock rate - SRAM memory access

❐ 25 MHz clock rate - RTC memory access

❐ Supports SPI mode 0 (0,0) and mode 3 (1,1)

■ Write protection

❐ Hardware protection using Write Protect (WP) pin

❐ Software protection using Write Disable instruction

❐ Software block protection for 1/4, 1/2, or entire array

■ Low power consumption

❐ Single 3 V +20%, –10% operation

❐ Average active current of 10 mA at 40 MHz operation

■ Industry standard configurations

❐ Industrial temperature

❐ 16-pin small outline integrated circuit (SOIC) package

❐ Restriction of hazardous substances (RoHS) compliant

Overview

The Cypress CY14B101P combines a 1-Mbit nonvolatile static

RAM with full featured real time clock in a monolithic integrated

circuit with serial SPI interface. The memory is organized as

128 K words of 8 bits each. The embedded nonvolatile elements

incorporate the QuantumTrap technology, creating the world’s

most reliable nonvolatile memory. The SRAM provides infinite

read and write cycles, while the QuantumTrap cells provide

highly reliable nonvolatile storage of data. Data transfers from

SRAM to the nonvolatile elements (STORE operation) takes

place automatically at power-down. On power-up, data is

restored to the SRAM from the nonvolatile memory (RECALL

operation). The STORE and RECALL operations can also be

initiated by the user through SPI instruction.

Logic Block Diagram

VCC

VCAP

CS

WP

SCK

HOLD

Instruction decode

Write protect

Control logic

QuantumTrap

128 K X 8

SRAM Array

128 K X 8

STORE

RECALL

Power Control

STORE/RECALL

Control

HSB

Instruction

register

D0-D7

Address

Decoder

A0-A16

RTC

Xout

X in

INT

SI

Data I/O register

MUX

SO

Status Register

Cypress Semiconductor Corporation • 198 Champion Court

Document Number: 001-44109 Rev. *M

• San Jose, CA 95134-1709 • 408-943-2600

Revised August 3, 2012

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