CY14B101MA(2011) Ver la hoja de datos (PDF) - Cypress Semiconductor
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CY14B101MA Datasheet PDF : 34 Pages
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CY14B101KA
CY14B101MA
1-Mbit (128 K × 8/64 K × 16) nvSRAM with
Real Time Clock
1-Mbit (128 K × 8/64 K × 16) nvSRAM with Real Time Clock
Features
■ 1-Mbit nonvolatile static random access memory (nvSRAM)
❐ 25 ns and 45 ns access times
❐ Internally organized as 128 K × 8 (CY14B101KA) or
64 K × 16 (CY14B101MA)
❐ Hands off automatic STORE on power-down with only a small
capacitor
❐ STORE to QuantumTrap nonvolatile elements is initiated by
software, hardware, or AutoStore on power-down
❐ RECALL to SRAM initiated on power-up or by software
■ High reliability
❐ Infinite Read, Write, and RECALL cycles
❐ 1 million STORE cycles to QuantumTrap
❐ 20 year data retention
■ Real time clock (RTC)
❐ Full featured real time clock
❐ Watchdog timer
❐ Clock alarm with programmable interrupts
❐ Capacitor or battery backup for RTC
❐ Backup current of 0.35 µA (Typ)
■ Industry standard configurations
❐ Single 3 V +20%, –10% operation
❐ Industrial temperature
■ Packages
❐ 44-/54-pin thin small outline package (TSOP) Type II
❐ 48-pin shrink small outline package (SSOP)
■ Pb-free and restriction of hazardous substances (RoHS)
compliant
Functional Description
The Cypress CY14B101KA/CY14B101MA combines a 1-Mbit
nvSRAM with a full featured real time clock in a monolithic
integrated circuit. The embedded nonvolatile elements
incorporate QuantumTrap technology producing the world’s
most reliable nonvolatile memory. The SRAM is read and written
an infinite number of times, while independent nonvolatile data
resides in the nonvolatile elements.
The real time clock function provides an accurate clock with leap
year tracking and a programmable, high accuracy oscillator. The
alarm function is programmable for periodic minutes, hours,
days, or months alarms. There is also a programmable watchdog
timer for process control.
Logic Block Diagram[1, 2, 3]
A5
R
A6
A7
O
W
A8
D
A9
E
A12
C
A13
O
A14
D
A15
E
A16
R
Quatrum
Trap
1024 X 1024
STORE
RECALL
STATIC RAM
ARRAY
1024 X 1024
VCC
VCA
P
POWER
CONTROL
STORE/RECALL
CONTROL
SOFTWARE
DETECT
VRTCbat
VRTCcap
HSB
A14 - A2
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
I
N
P
U
T
B
COLUMN I/O
U
F
F
E
R
COLUMN DEC
S
A0 A1 A2 A3 A4 A10 A11
RTC
MUX
Xout
Xin
INT
A16- A0
OE
WE
CE
BLE
BHE
Notes
1. Address A0–A16 for × 8 configuration and Address A0–A15 for × 16 configuration.
2. Data DQ0–DQ7 for × 8 configuration and Data DQ0–DQ15 for × 16 configuration.
3. BHE and BLE are applicable for × 16 configuration only.
Cypress Semiconductor Corporation • 198 Champion Court
Document #: 001-42880 Rev. *I
• San Jose, CA 95134-1709 • 408-943-2600
Revised July 22, 2011
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