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CY14B101K(RevE) Ver la hoja de datos (PDF) - Cypress Semiconductor

Número de pieza
componentes Descripción
Fabricante
CY14B101K
(Rev.:RevE)
Cypress
Cypress Semiconductor Cypress
CY14B101K Datasheet PDF : 24 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
PRELIMINARY
CY14B101K
Pin Configurations
VCAP
1
A16
2
A14
3
A12
4
A7
5
A6
6
A5
7
INT
8
A4
9
NC
10
NC
11
NC
12
VSS
13
NC
14
VRTCbat
15
DQ0
16
A3
17
A2
18
A1
19
A0
20
DQ1
21
DQ2
22
x1
23
x2
24
48-SSOP
Top View
(Not To Scale)
48
VCC
47
A15
46
HSB
45
WE
44
A13
43
A8
42
A9
41
NC
40
A11
39
NC
38
NC
37
NC
36
VSS
35
NC
34
VRTCcap
33
DQ6
32
OE
31
A10
30
CE
29
DQ7
28
DQ5
27
DQ4
26
DQ3
25
VCC
Pin Definitions
Pin Name IO Type
Description
A0 – A16
Input Address inputs used to select one of the 131,072 bytes of the nvSRAM.
DQ0 – DQ7 Input Output Bidirectional data IO lines. Used as input or output lines depending on operation
NC
No Connect No Connects. This pin is not connected to the die
WE
Input Write Enable Input, active LOW. When selected LOW, enables data on the IO pins to be written
to the address location latched by the falling edge of CE.
CE
Input Chip Enable Input, active LOW. When LOW, selects the chip. When HIGH, deselects the chip.
OE
Input Output Enable, active LOW. The active low OE input enables the data output buffers during READ
cycles. Deasserting OE high causes the IO pins to tri-state.
X1
X2
VRTCcap
VRTCbat
INT
Output Crystal connection, drives crystal on start up.
Input Crystal connection for 32.768 kHz crystal.
Power Supply Capacitor supplied backup RTC supply voltage. (Left unconnected if VRTCbat is used)
Power Supply Battery supplied backup RTC supply voltage. (Left unconnected if VRTCcap is used)
Output Interrupt Output. Program to respond to the clock alarm, the watchdog timer and the power monitor.
Programmable to either active HIGH (push/pull) or LOW (open drain).
VSS
VCC
HSB
VCAP
Ground Ground for the device. Must be connected to ground of the system.
Power Supply Power Supply inputs to the device.
Input Output Hardware Store Busy. When LOW this output indicates a Hardware Store is in progress. When
pulled low external to the chip it initiates a nonvolatile STORE operation. A weak internal pull up
resistor keeps this pin HIGH if not connected (connection optional).
Power Supply AutoStoreTM Capacitor. Supplies power to nvSRAM during power loss to store data from SRAM
to nonvolatile elements.
Document #: 001-06401 Rev. *E
Page 2 of 24
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