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CXD2570 Ver la hoja de datos (PDF) - Intersil

Número de pieza
componentes Descripción
Fabricante
CXD2570 Datasheet PDF : 8 Pages
1 2 3 4 5 6 7 8
Pin Descriptions
PIN NO.
SYMBOL
1
AVDD3
2
AOUT1 (-)
3
AVSS3
4
UCLK
5
XCLK
6
XVDD
7
XTLI
8
XTLO
9
XVSS
10
AVSS4
11
AOUT2 (-)
12
AVDD4
13
AOUT2 (+)
14
AVSS4
15
AVSS2
16
AIN1
17
AVDD2
18
NC
19
SUB
20
NC
21
DVSS
22
XMCK2
23
TEST
24
CLR
25
DVDD
26
MS
27
LRCK
HI2570, CXD2570
I/O
DESCRIPTION
Analog power supply for channel-1 DA converter
O
Analog reversed phase output of channel-1 DA converter
Analog GND for channel-1 DA converter
O
Outputs a 1/2 frequency divider of clock input from oscillation pin XTLI (Pin 7).
User clock output for the externally connected ICs.
O
256Fs/512Fs clock output. This provides the master clock for ICs operating in
the slave mode when multiple CXD2570Qs are connected.
Digital power supply for the master clock
I
Crystal oscillation circuit input. Connects the crystal oscillator selected by the
crystal selector pins XSL0 to 2 (Pins 34, 35 and 36). To input an external mas-
ter clock, this pin is used.
O
Crystal oscillation circuit output. Connects the crystal oscillator selected by the
crystal selector pins XSL0 to 2 (Pins 34, 35 and 36).
Digital GND for the master clock
Analog GND for channel-2 DA converter
O
Analog reversed phase output of channel-2 DA converter
Analog power supply for channel-2 DA converter
O
Analog forward phase output of channel-2 DA converter
Analog GND for channel-2 DA converter
Analog GND for channel-2 AD converter
I
Analog input of channel-2 converter
Analog power supply for channel-2 AD converter
Connected to the substrate in the IC (having the same potential as power sup-
ply). Connect this pin to GND via a capacitor on the external printed wiring
board.
Digital GND
O
IC measurement. Normally, Low is output.
I
Test. Normally, fixed at Low. Equipped with a pull-down resistor.
I
System clear input. Normally, fixed at High; cleared at Low. Equipped with a
pull-up resistor.
Digital power supply.
I
Master/slave mode switching input. High = Master mode. Low = Slave mode.
Equipped with a pull-up resistor.
I/O
Sampling frequency clock pin of serial I/O. Outputs in master mode (when Pin
26 is High). Inputs in slave mode (when Pin 26 is Low). Transfers channel-1
data at High; transfers channel-2 data at Low.
3

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