2)-2. HD/VD take-in characteristics
CXD2422R
HD, VD
1.6V
1.6V
CLK
0.7VDD
ts3
Symbol
Definition
ts3
HD/VD set-up time, activated by CLK
th3
HD/VD hold time, activated by CLK
th3
(VDD = 4.5 to 5.5V, Topr = –20 to +75°C)
Min. Typ. Max. Unit
4
ns
0
ns
2)-3. Field discrimination characteristics
VD
1.6V
tpd1
HD
When the HD logic level is Low tpd1 after
VD falls, the field is discriminated as an
ODD (EVEN with CCIR) field.
VD
1.6V
tpd1
HD
When the HD logic level is High tpd1 after
VD falls, the field is discriminated as an
EVEN (ODD with CCIR) field.
(VDD = 4.5 to 5.5V, Topr = –20 to +75°C)
Symbol
Definition
Min. Typ. Max. Unit
tpd1 Field discriminating clock phase, activated by the falling edge of VD 890
ns
–6–