CS61310 Ver la hoja de datos (PDF) - Cirrus Logic
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CS61310 Datasheet PDF : 30 Pages
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CS61310
ANALOG CHARACTERISTICS (TA = -40°C to 85°C; TV+, RV+ = 5.0 V ±5%; GND = 0 V)
Parameter
Min
Typ
Max
Units
Transmitter
AMI Output Pulse Amplitudes
(Note 8)
T1, (FCC Part 68) (Note 9) 2.7
T1, DSX-1 (Note 10) 2.4
External Equalizer Pulse Amplitude
4.8
Transmitter Output Impedance
Transformer turns ratio = 1:2
(Note 12)
Transformer turns ratio = 1:1.5
FCC
DSX1
External Equalizer
Jitter Added by the Transmitter
(Notes 11,12)
10 Hz - 8 kHz
-
8 kHz - 40 kHz
-
10 Hz - 40 kHz
-
Broad Band
-
Power in 2 kHz band about 772 kHz
(Notes 8, 12) 12.6
Power in 2 kHz band about 1.544 MHz
(Notes 8, 12) -29
(referenced to power in 2 kHz band at 772 kHz)
Positive to Negative Pulse Imbalance
(Notes 8, 12)
-
Transmitter Short Circuit Current
(Notes 8, 13)
-
Receiver
RTIP/RRING Input Impedance
-
Sensitivity Below DSX (0 dB = 3.0 V)
-40
30
Loss of Signal Threshold
-
Data Decision Threshold (Notes 12,14)
T1, DSX-1
T1, (FCC Part 68)
Allowable Consecutive Zeros before LOS
160
Receiver Input Jitter Tolerance(Note 16) T1:10 kHz - 100 kHz 0.4
(Note 12) 1 Hz 138
3.0
3.0
5.6
1.5
44
44
44
0.015
0.015
0.015
0.020
15
-38
0.2
-
20k
-
-
-42
50
50
175
-
-
3.3
V
3.6
V
6.4
V
Ω
Ω
Ω
Ω
-
UI
-
UI
-
UI
-
UI
17.9
dBm
-
dB
0.5
dB
50
mA RMS
-
Ω
-
dB
-
mV
-
dB
% of peak
% of peak
190
bits
-
UI
-
UI
Notes: 8. Using a 0.47 µF capacitor in series with the primary of a transformer recommended in the Applications
Section.
9. Pulse amplitude measured at the secondary side of the transformer across a 100 Ω load for line length
setting LEN2/1/0 = 0/1/0.
10. Pulse amplitude measured at the DSX-1 Cross-Connect for all line length settings from LEN2/1/0 =
0/1/1 to LEN2/1/0 = 1/1/1.
11. Assuming that jitter free clock is input to TCLK.
12. Not production tested. Parameters guaranteed by design and characterization.
13. Measured broadband through a 0.5 Ω resistor across the secondary of the transmitter transformer
during the transmission of an all ones data pattern.
14. Data decision threshold established after the receiver equalizer filters pulse overshoot and undershoot.
15. Jitter tolerance for 0 dB input signal level. Jitter tolerance increases at lower frequencies. See Figure 7.
16. See Receiver Jitter Tolerance Plot, Figure 7.
DS440PP2
5
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