CS5461A Ver la hoja de datos (PDF) - Cirrus Logic
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CS5461A Datasheet PDF : 44 Pages
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CS5461A
tPW
FREQE
E1 ...
...
E2 ...
...
Figure 4. Alternate Pulse Format on E1 and E2
is (MCLK/K)/16. The pulse duration (tdur) is an integer
multiple of MCLK cycles, approximately equal to:
td u r ( sec )
≅
----------------------1---------------------
PulseRateE1, 2 × 8
The maximum pulse duration (tdur) is determined by the
sampling rate and the minimum is defined by the maxi-
mum pulse frequency. The tdur limits are:
-----------------1------------------
(MCLK/K)/16 × 8
<
td u r ( sec )
<
--------------------1--------------------
(MCLK/K)/1024 × 8
The Pulse Width Register (PW) does not affect the nor-
mal format.
5.4.2 Alternate Pulse Format
Setting bits MECH = 1 and STEP = 0 in the Control
Register and ALT = 1 in the Configuration Register con-
figures the E1 and E2 pins for alternating pulse format
output (see Figure 4). Each pin produces alternating ac-
tive-low pulses with a pulse duration (tPW) defined by
the Pulse Width Register (PW):
tPW(ms)
=
----------------P-----W-------------------
(MCLK/K)/1024
If MCLK = 4.096 MHz, K = 1, and PW = 1 then
tPW = 0.25 ms. To ensure that pulses occur on the E1
and E2 output pins when full-scale input signals are ap-
plied to the voltage and current channels, then:
P u l s e R a t e E1,
2
<
-----1------
tPW
The pulse frequency (FREQE) is determined by the
PulseRateE1,2 Register and can be calculated using the
transfer function. The energy direction is not defined in
the alternate pulse format.
5.4.3 Mechanical Counter Format
Setting bits MECH = 1 and STEP = 0 in the Control
Register and bit ALT = 0 in the Configuration Register
enables E1 and E2 for mechanical counters and similar
discrete counting instruments. When energy is nega-
tive, pulses appear on E2 (see Figure 5). When energy
is positive, the pulses appear on E1. The pulse width is
defined by the Pulsewidth Register and will limit the out-
put pulse frequency (FREQE). By default, PW = 512
samples, if MCLK = 4.096 MHz and K = 1 then
tPW = 128 ms. To ensure that pulses will occur, the
PulseRateE1,2 Register must be set to an appropriate
value.
5.4.4 Stepper Motor Format
Setting bits STEP = 1 and MECH = 0 in the Control
Register and bit ALT = 0 in the Configuration Register
configures the E1 and E2 pins for stepper motor format.
When the accumulated active power equals the defined
E1 ...
E2 ...
DS661F2
FREQE
tPW
Positive Energy
Negative Energy
Figure 5. Mechanical Counter Format on E1 and E2
...
...
17
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