CS4954 CS4955
VSYNC Drops
Analog
Field 1
620 621 622 623 624 625 1
2
3
4
5
Analog
Field 2
6
7
308 309 310 311 312 313 314 315 316 317 318 319 320
Analog
Field 3
620 621 622 623 624 625 1
2
3
4
5
Analog
Field 4
6
7
308 309 310 311 312 313 314 315 316 317 318 319 320
23
24
336 337
23
24
336 337
Analog
Field 5
620 621 622 623 624 625 1
2
3
4
5
Analog
Field 6
6
7
308 309 310 311 312 313 314 315 316 317 318 319 320
Analog
Field 7
620 621 622 623 624 625 1
2
3
4
5
Analog
Field 8
6
7
308 309 310 311 312 313 314 315 316 317 318 319 320
23
24
336 337
23
24
336 337
Burst Phase = 135 degrees relative to U
Burst Phase = 225 degrees relative to U
Figure 8. PAL Video Interlaced Timing
As mentioned above, there are no horizontal and
vertical timing signals necessary in ITU-R.BT656
mode. However in some cases it is advantageous to
output these timing signals for other purposes. By
setting the 656_SYNC_OUT register bit in
CONTROL_6 register, HSYNC and VSYNC are
output,so that other devices in the system can syn-
chronize to these timing signals.
20
DS278F6