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CDP18243 Ver la hoja de datos (PDF) - Intersil

Número de pieza
componentes Descripción
Fabricante
CDP18243 Datasheet PDF : 5 Pages
1 2 3 4 5
CDP1824/3, CDP1824C/3
Write Cycle Dynamic Electrical Specifications Input tR, tF 15ns, CL = 50pF
TEST
CONDITIONS
LIMITS
-55oC, +25oC
+125oC
PARAMETER
SYMBOL
VDD
(V)
(NOTE 1)
MIN
MAX
(NOTE 1)
MIN
MAX
Write Pulse Width
tWRW
5
350
-
475
-
10
180
-
220
-
Data Setup Time
tDS
5
400
-
560
-
10
190
-
260
-
Data Hold Time
tDH
5
70
-
90
-
10
35
-
45
-
Chip Select Setup Time
tCS
5
550
-
775
-
10
340
-
475
-
Address Setup Time
tAS
5
550
-
775
-
10
340
-
475
-
NOTE:
1. Time required by a device to allow for the indicated function.
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
MA
CS
MWR
BUS
tAS
tCS
tWRW
tDS
tDH
FIGURE 2. WRITE CYCLE TIMING DIAGRAM
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
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