CDB5345(2004) Ver la hoja de datos (PDF) - Cirrus Logic
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Fabricante
CDB5345 Datasheet PDF : 39 Pages
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CS5345
SWITCHING CHARACTERISTICS - CONTROL PORT - SPI FORMAT
(Inputs: Logic 0 = DGND, Logic 1 = VLC, CL = 30 pF)
Parameter
Symbol Min Typ Max
CCLK Clock Frequency
RESET Rising Edge to CS Falling.
CS High Time Between Transmissions
CS Falling to CCLK Edge
CCLK Low Time
CCLK High Time
CDIN to CCLK Rising Setup Time
CCLK Rising to DATA Hold Time
CCLK Falling to CDOUT Stable
Rise Time of CDOUT
Fall Time of CDOUT
Rise Time of CCLK and CDIN
Fall Time of CCLK and CDIN
fsck
0
-
6.0
tsrs
500
-
ns
tcsh
1.0
-
-
tcss
20
-
-
tscl
66
-
-
tsch
66
-
-
tdsu
40
-
-
(Note 17)
tdh
15
-
-
tpd
-
-
50
tr1
-
-
25
tf1
-
-
25
(Note 18)
tr2
-
-
100
(Note 18)
tf2
-
-
100
Notes: 17. Data must be held for sufficient time to bridge the transition time of CCLK.
18. For fsck <1 MHz.
Units
MHz
µs
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
RST
t srs
CS
t css
CCLK
t r2
CDIN
CDOUT
t scl t sch
t f2
t dsu
t dh
t pd
Figure 6. Control Port Timing - SPI Format
t csh
19
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