CDB5345(2004) Ver la hoja de datos (PDF) - Cirrus Logic
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CDB5345 Datasheet PDF : 39 Pages
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CS5345
SWITCHING CHARACTERISTICS - CONTROL PORT - I²C FORMAT
(Inputs: Logic 0 = DGND, Logic 1 = VLC, CL = 30 pF)
Parameter
Symbol
Min
Max
Unit
SCL Clock Frequency
fscl
-
RESET Rising Edge to Start
tirs
500
Bus Free Time Between Transmissions
tbuf
4.7
Start Condition Hold Time (prior to first clock pulse)
thdst
4.0
Clock Low time
tlow
4.7
Clock High Time
thigh
4.0
Setup Time for Repeated Start Condition
tsust
4.7
SDA Hold Time from SCL Falling
(Note 15) thdd
0
SDA Setup time to SCL Rising
tsud
250
Rise Time of SCL and SDA
(Note 16)
trc
-
Fall Time SCL and SDA
(Note 16)
tfc
-
Setup Time for Stop Condition
tsusp
4.7
Acknowledge Delay from SCL Falling
tack
300
100
kHz
-
ns
-
µs
-
µs
-
µs
-
µs
-
µs
-
µs
-
ns
1
µs
300
ns
-
µs
1000
ns
Notes: 15. Data must be held for sufficient time to bridge the transition time, tfc, of SCL.
16. Guaranteed by design.
RST
SDA
SCL
t irs
Stop
S ta rt
t buf
t hdst
t
lo w
t high
R ep e a te d
S ta rt
t rd
t hdst
t fc
t
hdd
t sud
t ack
t sust
t rc
Figure 5. Control Port Timing - I²C Format
Stop
t fd
t susp
18
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