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CAV24C64 Datasheet PDF : 10 Pages
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CAV24C64
64-Kb I2C CMOS Serial
EEPROM
Description
The CAV24C64 is a 64−Kb CMOS Serial EEPROM device,
internally organized as 8192 words of 8 bits each.
It features a 32−byte page write buffer and supports the Standard
(100 kHz) and Fast (400 kHz) I2C protocol.
External address pins make it possible to address up to eight
CAV24C64 devices on the same bus.
Features
• Automotive Temperature Grade 1 (−40°C to +125°C)
• Supports Standard and Fast I2C Protocol
• 2.5 V to 5.5 V Supply Voltage Range
• 32−Byte Page Write Buffer
• Hardware Write Protection for Entire Memory
• CAV Prefix for Automotive and Other Applications Requiring Site
and Change Control
• Schmitt Triggers and Noise Suppression Filters on I2C Bus Inputs
(SCL and SDA)
• Low Power CMOS Technology
• 1,000,000 Program/Erase Cycles
• 100 Year Data Retention
• SOIC, TSSOP 8−lead Packages
• This Device is Pb−Free, Halogen Free/BFR Free, and RoHS
Compliant
VCC
SCL
A2, A1, A0
WP
CAV24C64
SDA
VSS
Figure 1. Functional Symbol
http://onsemi.com
SOIC−8
W SUFFIX
CASE 751BD
TSSOP−8
Y SUFFIX
CASE 948AL
PIN CONFIGURATION
A0
1
A1
A2
VSS
VCC
WP
SCL
SDA
SOIC (W), TSSOP (Y)
For the location of Pin 1, please consult the
corresponding package drawing.
Pin Name
A0, A1, A2
SDA
SCL
WP
VCC
VSS
PIN FUNCTION
Function
Device Address Input
Serial Data Input/Output
Serial Clock Input
Write Protect Input
Power Supply
Ground
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 10 of this data sheet.
© Semiconductor Components Industries, LLC, 2011
1
March, 2011 − Rev. 0
Publication Order Number:
CAV24C64/D
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