C8051F398 Ver la hoja de datos (PDF) - Silicon Laboratories

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C8051F398

50 MIPS 16 kB Flash, 512B EEPROM Mixed-Signal MCU

Silicon Laboratories 

C8051F39x/37x

28.3.4. SCL Low Timeout.................................................................................. 192

28.3.5. SCL High (SMBus Free) Timeout ......................................................... 193

28.4. Using the SMBus........................................................................................... 193

28.4.1. SMBus Configuration Register.............................................................. 193

28.4.2. SMBus Pin Swap .................................................................................. 195

28.4.3. SMBus Timing Control .......................................................................... 195

28.4.4. SMBnCN Control Register .................................................................... 199

28.4.4.1. Software ACK Generation ............................................................ 199

28.4.4.2. Hardware ACK Generation ........................................................... 199

28.4.5. Hardware Slave Address Recognition .................................................. 202

28.4.6. Data Register ........................................................................................ 207

28.5. SMBus Transfer Modes................................................................................. 209

28.5.1. Write Sequence (Master) ...................................................................... 209

28.5.2. Read Sequence (Master) ...................................................................... 210

28.5.3. Write Sequence (Slave) ........................................................................ 211

28.5.4. Read Sequence (Slave) ........................................................................ 212

28.6. SMBus Status Decoding................................................................................ 212

29. UART0 ................................................................................................................... 218

29.1. Enhanced Baud Rate Generation.................................................................. 219

29.2. Operational Modes ........................................................................................ 220

29.2.1. 8-Bit UART ............................................................................................ 220

29.2.2. 9-Bit UART ............................................................................................ 221

29.3. Multiprocessor Communications ................................................................... 222

30. Enhanced Serial Peripheral Interface (SPI0) ..................................................... 226

30.1. Signal Descriptions........................................................................................ 227

30.1.1. Master Out, Slave In (MOSI)................................................................. 227

30.1.2. Master In, Slave Out (MISO)................................................................. 227

30.1.3. Serial Clock (SCK) ................................................................................ 227

30.1.4. Slave Select (NSS) ............................................................................... 227

30.2. SPI0 Master Mode Operation ........................................................................ 228

30.3. SPI0 Slave Mode Operation .......................................................................... 229

30.4. SPI0 Interrupt Sources .................................................................................. 230

30.5. Serial Clock Phase and Polarity .................................................................... 230

30.6. SPI Special Function Registers ..................................................................... 232

31. Timers ................................................................................................................... 240

31.1. Timer 0 and Timer 1 ...................................................................................... 243

31.1.1. Mode 0: 13-bit Counter/Timer ............................................................... 243

31.1.2. Mode 1: 16-bit Counter/Timer ............................................................... 244

31.1.3. Mode 2: 8-bit Counter/Timer with Auto-Reload..................................... 245

31.1.4. Mode 3: Two 8-bit Counter/Timers (Timer 0 Only)................................ 246

31.2. Timer 2 .......................................................................................................... 251

31.2.1. 16-bit Timer with Auto-Reload............................................................... 251

31.2.2. 8-bit Timers with Auto-Reload............................................................... 252

31.2.3. Low-Frequency Oscillator (LFO) Capture Mode ................................... 253

31.3. Timer 3 .......................................................................................................... 257

6

Preliminary Rev. 0.71

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