C8051F300DK Ver la hoja de datos (PDF) - Unspecified

Número de pieza

componentes Descripción

Fabricante

C8051F300DK

Mixed Signal ISP Flash MCU Family

Unspecified 

C8051F300/1/2/3/4/5

List of Tables

1. System Overview

Table 1.1. Product Selection Guide ......................................................................... 16

2. Absolute Maximum Ratings

Table 2.1. Absolute Maximum Ratings* .................................................................. 26

3. Global DC Electrical Characteristics

Table 3.1. Global DC Electrical Characteristics ....................................................... 27

4. Pinout and Package Definitions

Table 4.1. Pin Definitions for the C8051F300/1/2/3/4/5 ........................................... 28

Table 4.2. QFN-11 Package Diminsions ................................................................. 30

5. ADC0 (8-Bit ADC, C8051F300/2)

Table 5.1. ADC0 Electrical Characteristics .............................................................. 45

6. Voltage Reference (C8051F300/2)

Table 6.1. External Voltage Reference Circuit Electrical Characteristics ................ 48

7. Comparator0

Table 7.1. Comparator0 Electrical Characteristics .................................................. 53

8. CIP-51 Microcontroller

Table 8.1. CIP-51 Instruction Set Summary ............................................................ 57

Table 8.2. Special Function Register (SFR) Memory Map ...................................... 64

Table 8.3. Special Function Registers* ................................................................... 64

Table 8.4. Interrupt Summary .................................................................................. 72

9. Reset Sources

Table 9.1. User Code Space Address Limits ........................................................... 84

Table 9.2. Reset Electrical Characteristics .............................................................. 84

10. Flash Memory

Table 10.1. Flash Electrical Characteristics ............................................................ 88

Table 10.2. Security Byte Decoding ........................................................................ 89

11. Oscillators

Table 11.1. Internal Oscillator Electrical Characteristics ......................................... 95

12. Port Input/Output

Table 12.1. Port I/O DC Electrical Characteristics ................................................. 106

13. SMBus

Table 13.1. SMBus Clock Source Selection .......................................................... 112

Table 13.2. Minimum SDA Setup and Hold Times ................................................ 113

Table 13.3. Sources for Hardware Changes to SMB0CN ..................................... 117

Table 13.4. SMBus Status Decoding ..................................................................... 123

14. UART0

Table 14.1. Timer Settings for Standard Baud Rates Using The Internal 24.5 MHz Os-

cillator ................................................................................................. 134

Table 14.2. Timer Settings for Standard Baud Rates Using an External 25 MHz Oscil-

lator ..................................................................................................... 134

Table 14.3. Timer Settings for Standard Baud Rates Using an External 22.1184 MHz

Oscillator ............................................................................................. 135

Rev. 2.6

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