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C8051F040-DK

C8051F04X DEVELOPMENT KIT USER’S GUIDE

Silicon Laboratories 

C8051F04x-DK

6.1. System Clock Sources

The C8051F040 device installed on the target board features a calibrated programmable internal oscillator which is

enabled as the system clock source on reset. After reset, the internal oscillator operates at a frequency of

3.0625 MHz (±2%) by default but may be configured by software to operate at other frequencies. Therefore, in many

applications an external oscillator is not required. However, an external 22.1184 MHz crystal is installed on the target

board for additional applications. Refer to the C8051F04x data sheet for more information on configuring the system

clock source.

6.2. Switches and LEDs

Two switches are provided on the target board. Switch SW1 is connected to the RESET pin of the C8051F040.

Pressing SW1 puts the device into its hardware-reset state. Switch SW2 is connected to the C8051F040’s general

purpose I/O (GPIO) pin through headers. Pressing SW2 generates a logic low signal on the port pin. Remove the

shorting block from the header to disconnect SW2 from the port pins. The port pin signal is also routed to a pin on

the J24 I/O connector. See Table 1 for the port pins and headers corresponding to each switch.

Two LEDs are also provided on the target board. The red LED labeled PWR is used to indicate a power connection

to the target board. The green LED labeled with a port pin name is connected to the C8051F040’s GPIO pin

through headers. Remove the shorting block from the header to disconnect the LED from the port pin. The port pin

signal is also routed to a pin on the J24 I/O connector. See Table 1 for the port pins and headers corresponding to

each LED.

Table 1. Target Board I/O Descriptions

Description

SW1

SW2

Green LED

Red LED

I/O

Reset

P3.7

P1.6

PWR

Header

none

J1

J3

none

6.3. Target Board JTAG Interface (J4)

The JTAG connector (J4) provides access to the JTAG pins of the C8051F040. It is used to connect the Serial

Adapter or the USB Debug Adapter to the target board for in-circuit debugging and Flash programming. Table 2

shows the JTAG pin definitions.

Table 2. JTAG Connector Pin Descriptions

Pin #

1

2, 3, 9

4

5

6

7

8, 10

Description

+3 VD (+3.3 VDC)

GND (Ground)

TCK

TMS

TDO

TDI

Not Connected

8

Rev. 0.6

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