SAA7391H Ver la hoja de datos (PDF) - Philips Electronics
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SAA7391H Datasheet PDF : 108 Pages
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Philips Semiconductors
ATAPI CD-R block encoder/decoder
Objective specification
SAA7391
SYMBOL
DGND9
VDDD(pad4)
COMACK
PIN
TYPE
DRIVE/
THRESHOLD
103
−
−
104
−
−
105
I
C
COMCLK
106
O
L
n.c.
107 to 110 −
−
COMOUT
111
O
L
COMIN
112
I
C
COMSYNC
113
I
C
SYSSYNC
114
I
C
SCCLK
115
O
M
RD
116
I
T
WR/R/W
117
I
T
INT
118
O
L
SRST
119
O
L
SCA0/SCD0 120
I/O
L/T
SCA1/SCD1 121
I/O
L/T
DGND10
122
−
−
VDDD(pad5)
123
−
−
SCA2/SCD2 124
I/O
L/T
SCA3/SCD3 125
I/O
L/T
SCA4/SCD4 126
I/O
L/T
SCA5/SCD5 127
I/O
L/T
SCA6/SCD6 128
I/O
L/T
SCA7/SCD7 129
I/O
L/T
DGND11
130
−
−
VDDD(core2)
131
−
−
ALE
132
I
T
PSEN
133
I
T
SCA15
134
I
T
SCA14
135
I
T
SCA13
136
I
T
SCA12
137
I
T
DGND12
138
−
−
GROUPING
DESCRIPTION
−
−
UART
UART
−
UART
UART
UART
UART
sub-CPU
sub-CPU
sub-CPU
sub-CPU
sub-CPU
sub-CPU
digital ground 9
digital peripheral supply voltage 4
command acknowledge/transmit flow control
input
serial data clock for synchronous mode output
not connected
transmit data output
receive data input
basic engine synchronization input
basic engine synchronization input
sub-CPU clock output
sub-CPU read enable (active LOW)
sub-CPU write enable/and read/write control
input (active LOW)
sub-CPU interrupt request output from host
interface (active LOW)
sub-CPU reset output
multiplexed address/data lines
−
−
sub-CPU
digital ground 10
digital peripheral supply voltage 6
multiplexed address/data lines
−
−
sub-CPU
sub-CPU
sub-CPU
digital ground 11
digital core supply voltage 2
demultiplex enable input for lower address
lines
program store enable (active LOW)
upper address lines input
−
digital ground 12
1997 Aug 01
9
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